IP Library Granted Patent US 9,959,215
Granted Patent B2
US 9,959,215 · App. 14/964,971 · Granted May 1, 2018

Efficient address-to-symbol translation of stack traces in software programs

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Quick Facts
Patent No.
US 9,959,215
App. No.
14/964,971
Granted
May 1, 2018
Kind
B2
Abstract

The disclosed embodiments provide a system for processing data. During operation, the system obtains an attribute of a stack trace of a software program. Next, the system uses the attribute to select an address-translation instance from a set of address-translation instances for processing the stack trace. The system then provides the stack trace to the selected address-translation instance for use in translating a set of memory addresses in the stack trace into a set of symbols of instructions stored at the memory addresses.

Claims (57)

1. A method, comprising:

obtaining an attribute of a stack trace of a software program;

using the attribute to select, by a computer system, an address-translation instance from a set of address-translation instances for processing the stack trace; and

providing the stack trace to the selected address-translation instance for use in translating a set of memory addresses in the stack trace into a set of symbols of instructions stored at the memory addresses, wherein translating the set of memory addresses comprises processing, by the selected address-translation instance, the stack trace by:

obtaining one or more symbol files, each symbol file comprising a set of mappings of the memory addresses in the software program to the symbols of the instructions stored at the memory addresses;

using the sets of mappings from the one or more symbol files to replace the memory addresses in the stack trace with the symbols; and

caching, in a memory associated with the selected address-translation instance, for at least one of the memory addresses that was replaced, a mapping of the memory address to a symbol of a corresponding instruction, the caching comprising associating the memory address and stack trace information with the symbol stored in the cached mapping; and

using the cached mapping to replace the memory address with the symbol in a subsequent stack trace of the software program.

2. The method of claim 1 , wherein using the cached mapping to replace the memory address in the subsequent stack trace with the symbol comprises:

matching the memory address and stack trace information comprising a binary name and a build number to the symbol in the cached mapping.

3. The method of claim 1 , further comprising:

processing, by the selected address-translation instance, one or more additional stack traces in parallel with the stack trace.

4. The method of claim 3 , wherein processing the one or more additional stack traces in parallel with the stack trace comprises:

using a separate instance of a utility for translating the memory addresses into the symbols for each symbol file comprising the set of mappings of the memory addresses to the symbols.

5. The method of claim 3 , wherein processing the one or more additional stack traces in parallel with the stack trace comprises:

using a separate thread to replace a subset of the memory addresses from a binary in the software program with a subset of the symbols of the corresponding instructions stored at the subset of the memory addresses.

6. The method of claim 1 , wherein obtaining the set of mappings of the memory addresses to the symbols comprises:

matching the attribute to a location of the set of mappings in a binary store; and

when the set of mappings is not present in the binary store, obtaining the set of mappings from a fallback source.

7. The method of claim 1 , wherein using the attribute to select the address-translation instance from the set of address-translation instances for processing the stack trace comprises:

calculating a hash from the attribute; and

using the hash to select the address-translation instance for processing the stack trace.

8. The method of claim 1 , wherein the attribute comprises an identifier for a build of the software program.

9. An apparatus, comprising:

one or more processors; and

memory storing instructions that, when executed by the one or more processors, cause the apparatus to:

obtain an attribute of a stack trace of a software program;

use the attribute to select an address-translation instance from a set of address-translation instances for processing the stack trace; and

provide the stack trace to the selected address-translation instance for use in translating a set of memory addresses in the stack trace into a set of symbols of instructions stored at the memory addresses, wherein translating the set of memory addresses comprises processing, by the selected address-translation instance, the stack trace by:

obtaining one or more symbol files, each symbol file comprising a set of mappings of the memory addresses in the software program to the symbols of the instructions stored at the memory addresses;

using the sets of mappings from the one or more symbol files to replace the memory addresses in the stack trace with the symbols; and

caching, in a memory associated with the selected address-translation instance, for at least one of the memory addresses that was replaced, a mapping of the memory address to a symbol of a corresponding instruction, the caching comprising associating the memory address and stack trace information with the symbol stored in the cached mapping; and

using the cached mapping to replace the memory address with the symbol in a subsequent stack trace of the software program.

10. The apparatus of claim 9 , wherein using the cached mapping to replace the memory address in the subsequent stack trace with the symbol comprises:

matching the memory address and stack trace information comprising a binary name and a build number to the symbol in the cached mapping.

11. The apparatus of claim 9 , wherein the memory further stores instructions that, when executed by the one or more processors, cause the apparatus to perform on the selected address-translation instance:

processing one or more additional stack traces in parallel with the stack trace.

12. The apparatus of claim 11 , wherein processing the one or more additional stack traces in parallel with the stack trace comprises:

using a separate instance of a utility for translating the memory addresses into the symbols for each symbol file comprising the set of mappings of the memory addresses to the symbols.

13. The apparatus of claim 11 , wherein processing the one or more additional stack traces in parallel with the stack trace comprises:

using a separate thread to replace a subset of the memory addresses from a binary in the software program with a subset of the symbols of the corresponding instructions stored at the subset of the memory addresses.

14. The apparatus of claim 9 , wherein obtaining the set of mappings of the memory addresses to the symbols comprises:

matching the attribute to a location of the set of mappings in a binary store; and

when the set of mappings is not present in the binary store, obtaining the mapping from a fallback source.

15. The apparatus of claim 9 , wherein using the attribute to select the address-translation instance from the set of address-translation instances for processing the stack trace comprises:

calculating a hash from the attribute; and

using the hash to select the address-translation instance for processing the stack trace.

16. A system, comprising:

a selection module comprising a non-transitory computer-readable medium comprising instructions that, when executed by one or more processors, cause the system to:

obtain an attribute of a stack trace of a software program;

use the attribute to select an address-translation instance from a set of address-translation instances for processing the stack trace; and

provide the stack trace to the selected address-translation instance for use in translating a set of memory addresses in the stack trace into a set of symbols of instructions stored at the memory addresses; and

the selected address translation instance comprising a non-transitory computer-readable medium comprising instructions that, when executed by one or more processors, cause the system to:

obtain one or more symbol files, each symbol file comprising a set of mappings of the memory addresses in the software program to the symbols of the instructions stored at the memory addresses;

use the sets of mappings from the one or more symbol files to replace the memory addresses in the stack trace with the symbols; and

cache, in a memory associated with the selected address-translation instance, for at least one of the memory addresses that was replaced, a mapping of the memory address to a symbol of a corresponding instruction, the caching comprising associating the memory address and stack trace information with the symbol stored in the cached mapping; and

use the cached mapping to replace the memory address with the symbol in a subsequent stack trace of the software program.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 1, 2017
From: LINKEDIN CORPORATION
To: MICROSOFT TECHNOLOGY LICENSING, LLC
Reel/Frame 044746/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2015
From: BOEHM, ARMAN H.; RAO, ANANT R.; WENG, JUI TING; RAMACHANDRA, HARICHARAN K.
To: LINKEDIN CORPORATION
Reel/Frame 037283/0485 →