Method and apparatus for protecting a PCI device controller from masquerade attacks by malware
View Patent ↗A technique allows for protecting a PCI device controller from a PCI BDF masquerade attack from Ring- 0 and Ring- 3 malware. The technique may use Virtualization technologies to create guest virtual machines that can use a hypervisor to allocate ACPI information from ACPI tables to a secure VM and using extended page tables (EPT) and VT-d policies to protect the MMIO memory range during illegal runtime events.
1. A machine readable storage device, comprising instructions that when executed cause a machine to:
identify with a controller enumerated information from a peripheral device;
perform a secure hypervisor boot to create at least one secure virtual machine and an unsecure virtual machine;
disable legacy enumeration for the peripheral device responsive to performing the secure hypervisor boot;
communicate the enumerated information to one or more configuration-interface tables of the secure virtual machine;
allow access to the enumerated information for the secure virtual machine responsive to communicating the enumerated information to the secure virtual machine; and
monitor changes to the enumerated information.
2. The machine readable storage device of claim 1 , wherein the instructions that cause the machine to identify the enumerated information at least cause the machine to store memory mapped address ranges and controller information in the one or more configuration-interface tables.
3. The machine readable storage device of claim 1 , wherein the instructions that cause the machine to perform a secure hypervisor boot at least cause the machine to:
initialize a hypervisor; and
load a first operating system in the secure virtual machine; and
load a second operating system in the unsecure virtual machine.
4. The machine readable storage device of claim 1 , wherein the instructions at least cause the machine to perform enumeration of the secure virtual machine.
5. The machine readable storage device of claim 4 , wherein the instructions to perform the enumeration of the secure virtual machine at least cause the machine to identify a memory mapped address range in the one or more configuration-interface tables, wherein the memory mapped address range is associated with a configuration space of a peripheral controller.
6. The machine readable storage device of claim 1 , wherein the instructions to disable the legacy enumeration of the peripheral device at least cause the machine to disable read and writes to a legacy configuration address input-output port.
7. The machine readable storage device of claim 1 , wherein the instructions at least cause the machine to enable communication between the secure virtual machine and the peripheral device.
8. The machine readable storage device of claim 2 , wherein the instructions to allow the access for the secure virtual machine at least cause the machine to provide access to the memory mapped address ranges associated with the secure virtual machine using extended page tables.
9. The machine readable storage device of claim 8 , wherein the instructions to provide the access for the secure virtual machine at least cause the machine to provide direct memory access by the controller to the memory mapped address ranges associated with the secure virtual machine.
10. A method for address protection, comprising:
identifying with a controller enumerated information from a peripheral device;
performing a secure hypervisor boot to create at least one secure virtual machine and an unsecure virtual machine;
disabling legacy enumeration for the peripheral device responsive to performing the secure hypervisor boot;
communicating the enumerated information to one or more configuration-interface tables of the secure virtual machine;
allow access to the enumerated information for the secure virtual machine responsive to communicating the enumerated information to the secure virtual machine; and
monitoring changes to the enumerated information.
11. The method of claim 10 , further including storing memory mapped address ranges and controller information in the one or more configuration-interface tables.
12. The method of claim 10 , further including identifying a memory mapped address range in the one or more configuration-interface tables, wherein the memory mapped address range is associated with a configuration space of a peripheral controller.
13. The method of claim 10 , further including:
initializing a hypervisor; and
loading a first operating system in the secure virtual machine; and
loading a second operating system in the unsecure virtual machine.
14. The method of claim 10 , further including performing enumeration of the secure virtual machine.
15. The method of claim 10 , further including disabling read and writes to a legacy configuration address input-output port responsive to disabling the legacy enumeration.
16. The method of claim 10 , further including enabling communication between the secure virtual machine and the peripheral device.
17. The method of claim 11 , further including providing access to the memory mapped address ranges associated with the secure virtual machine using extended page tables responsive to allowing the access for the secure virtual machine.
18. The method of claim 17 , further including providing direct memory access by the controller to the memory mapped address ranges associated with the secure virtual machine.
19. A computer system for address protection, comprising:
one or more processors; and
a memory coupled to the one or more processors, the memory comprising instructions that when executed cause one or more of the processors to:
identify with a controller enumerated information from a peripheral device;
execute a secure hypervisor boot to create at least one secure virtual machine and an unsecure virtual machine;
disable legacy enumeration for the peripheral device responsive to performing the secure hypervisor boot;
communicate the enumerated information to one or more configuration-interface tables of the secure virtual machine;
allow access to the enumerated information for the secure virtual machine responsive to communicating the enumerated information to the secure virtual machine; and
monitor changes to the enumerated information.
20. The computer system of claim 19 , wherein the instructions, when executed, cause the one or more of the processors to store a memory mapped address range and controller information in the one or more configuration-interface tables.
21. The computer system of claim 20 , wherein the instructions, when executed, cause the one or more of the processors to identify a memory mapped address range in the one or more configuration-interface tables, wherein the memory mapped address range is associated with a configuration space of a peripheral controller.
22. The computer system of claim 21 , wherein the instructions, when executed, cause the one or more of the processors to provide access to the memory mapped address range for the secure virtual machine using extended page tables.
23. The computer system of claim 21 , wherein the instructions, when executed, cause the one or more of the processors to provide direct memory access by the controller to the memory mapped address range associated with the secure virtual machine.
24. The computer system of claim 19 , wherein the instructions, when executed, cause the one or more of the processors to:
initialize a hypervisor; and
load a first operating system in the secure virtual machine; and
load a second operating system in the unsecure virtual machine.
25. The computer system of claim 19 , wherein the instructions, when executed, cause the one or more of the processors to disable read and writes to a legacy configuration address input-output port.