IP Library Granted Patent US 9,667,449
Granted Patent B1
US 9,667,449 · App. 14/975,874 · Granted May 30, 2017

Channel estimator, demodulator and method for channel estimation

Inventor: Zhen Lu (Shanghai, CN)
Assignee: MONTAGE TECHNOLOGY (SHANGHAI) CO., LTD.
H04L25/0226H04L27/265H04L27/2613
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Quick Facts
Patent No.
US 9,667,449
App. No.
14/975,874
Granted
May 30, 2017
Kind
B1
Abstract

A channel estimator, comprises: a receiver receives a first time-domain training sequence; a first convolution circuit generates an estimated value for the first time-domain training sequence by convoluting a second time-domain training sequence with a current channel estimation value; a first subtractor generates an error by subtracting the estimated value for the first time-domain training sequence from the value of the first time-domain training sequence; an updating circuit generates an updated channel estimation value by updating the current channel estimation value with the error; the receiver iteratively receives a next symbol of the first time-domain training sequence, the first convolution circuit, the subtractor and the updating circuit repeat their operation until completion of receipt of a last symbol of the first time-domain training sequence. The updating circuit outputs the current updated channel estimation value upon completion of receipt of a last first time-domain training sequence.

Claims (48)

1. A channel estimator, comprising:

a receiver, configured to receive a symbol of a first time-domain training sequence;

a first convolution circuit, configured to generate an estimated value for the first time-domain training sequence by convoluting a second time-domain training sequence with a current channel estimation value, wherein the second time-domain training sequence represents a time-domain training sequence generated by the receiver;

a first subtractor coupled to both the receiver and the first convolution circuit, and configured to generate an error by subtracting the estimated value for the first time-domain training sequence from a value of the first time-domain training sequence;

an updating circuit coupled to both the first subtractor and the first convolution circuit and configured to generate an updated channel estimation value by updating the current channel estimation value with the error, and sending the updated channel estimation value to the first convolution circuit; wherein

the receiver iteratively receives a next symbol of the first time-domain training sequence, the first convolution circuit, the first subtractor and the updating circuit repeat their operation using the updated channel estimation value until completion of receipt of a last symbol of the first time-domain training sequence,

and the updating circuit is configured to output the current updated channel estimation value as a channel estimation result upon receipt of a last symbol of the first time-domain training sequence.

2. The channel estimator of claim 1 , further comprising

an equalizer configured to generate a pre-equalized signal by pre-equalizing a received signal;

a signal re-constructor coupled to the equalizer and configured to generate a reconstructed interference signal based on the pre-equalized signal;

a second subtractor coupled to both the signal re-constructor and the receiver and configured to generate the first time-domain training sequence by subtracting the reconstructed interference signal from a received signal for a frame.

3. The channel estimator of claim 2 , wherein the equalizer further comprises

a FFT circuit, configured to generate a FFT result by performing FFT calculation on the received signal;

a divider coupled to the FFT circuit and configured to generate a quotient by dividing the FFT result by a channel estimation value of a previous frame; and

a decision circuit, coupled to the divider and configured to retrieve a transmitting signal based on the quotient.

4. The channel estimator of claim 2 , wherein the signal re-constructor further comprises

an IFFT circuit configured to generate an IFFT result by performing IFFT calculation on the pre-equalized signal; and

a second convolution circuit, configured to generate the reconstructed interference signal by convoluting the IFFT result with a channel estimation value of a previous frame.

5. The channel estimator of claim 2 , wherein the signal re-constructor further comprises

a multiplier, configured to generate a multiplied signal by multiplying the pre-equalized signal with a channel estimation value of a previous frame; and

an IFFT circuit configured to generate the reconstructed interference signal by performing IFFT calculation on the multiplied signal.

6. The channel estimator of claim 1 , wherein the updating circuit is further configured to

generate an updated channel estimation value by updating the current channel estimation value with the error using least mean squares algorithm.

7. The channel estimator of claim 1 , wherein the channel estimator is used in a single carrier mode, and the channel estimator reuses a decision feedback equalizer.

8. A demodulator comprising the channel estimator according claim 1 .

9. A method of channel estimation, comprising:

receiving, at a receiver, a first time-domain training sequence;

generating an estimated value for the first time-domain training sequence by convoluting a second time-domain training sequence with a current channel estimation value, wherein the second time-domain training sequence represents a time-domain training sequence generated by the receiver;

generating an error by subtracting the estimated value for the first time-domain training sequence from a value of the first time-domain training sequence;

generating an updated channel estimation value by updating the current channel estimation value with the error; and

iteratively receiving a next symbol of the first time-domain training sequence, generating an estimated value for an updated first time-domain training sequence, generating an updated error, and generating an update of the updated channel estimation value, until completion of receipt of a last symbol of the first time-domain training sequence,

and outputting the current updated channel estimation value as a channel estimation result upon completion of receipt of a last symbol of the first time-domain training sequence.

10. The method of claim 9 , further comprising

generating a pre-equalized signal by pre-equalizing a received signal;

generating a reconstructed interference signal based on the pre-equalized signal; and

generating the first time-domain training sequence by subtracting the reconstructed interference signal from a received signal for a frame.

11. The method of claim 10 , wherein generating a pre-equalized signal by pre-equalizing a received signal is implemented by

generating a FFT result by performing FFT calculation on the received signal;

generating a quotient by dividing the FFT result by a channel estimation value of a previous frame; and

retrieving a transmitting signal based on the quotient.

12. The method of claim 10 , wherein generating a reconstructed interference signal is implemented by:

generating an IFFT result by performing IFFT calculation on the pre-equalized signal; and

generating the reconstructed interference signal by convoluting the IFFT result with a channel estimation value of a previous frame.

13. The method of claim 10 , wherein generating a reconstructed interference signal is implemented by:

generating a multiplied signal by multiplying the pre-equalized signal with a channel estimation value of a previous frame; and

generating the reconstructed interference signal by performing IFFT calculation on the multiplied signal.

14. The method of claim 9 , wherein generating an updated channel estimation value by updating the current channel estimation value with the error is implemented by

generating an updated channel estimation value by updating the current channel estimation value with the error using least mean squares algorithm.

Assignments (4)
SECURITY INTEREST Recorded Apr 24, 2024
From: MONTAGE LZ SEMICONDUCTOR (SHANGHAI) CO., LTD.; MONTAGE LZ TECHNOLOGIES (CHENGDU) CO., LTD.
To: RENLAI ELECTRONIC TECHNOLOGIES (SHANGHAI) CO., LTD.
Reel/Frame 067200/0638 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 3, 2017
From: MONTAGE TECHNOLOGY (SHANGHAI) CO., LTD.
To: MONTAGE LZ SEMICONDUCTOR (SHANGHAI) CO., LTD.; MONTAGE LZ TECHNOLOGIES (CHENGDU) CO., LTD.
Reel/Frame 044033/0131 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ADDRESS OF THE ASSIGNEE PREVIOUSLY RECORDED ON REEL 037336 FRAME 0185. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Aug 29, 2016
From: LU, ZHEN
To: MONTAGE TECHNOLOGY (SHANGHAI) CO., LTD.
Reel/Frame 039862/0861 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2015
From: LU, ZHEN
To: MONTAGE TECHNOLOGY (SHANGHAI) CO., LTD.
Reel/Frame 037336/0185 →
Priority Claims (1)
CN 2015 1 0887422 · Dec 4, 2015 · national