Multi-gate device and method of fabrication thereof

1. A method comprising:

forming a first fin extending from a substrate, the first fin having a source/drain region and a channel region, wherein the first fin is formed of a first stack of epitaxial layers that includes first epitaxial layers having a first composition interposed by second epitaxial layers having a second composition;

removing the second epitaxial layers from the source/drain region of the first fin to form first gaps;

covering a portion of the first epitaxial layers with a dielectric layer and filling the first gaps with the dielectric material; and

growing another epitaxial material on at least two surfaces of each of the first epitaxial layers to form a first source/drain feature while the dielectric material fills the first gaps, wherein the another epitaxial material physically contacts the at least two surfaces of each of the first epitaxial layers.

2. The method of claim 1 , further comprising:

forming a third epitaxial layer underlying the first epitaxial layers;

oxidizing the third epitaxial layer to form an oxidized third epitaxial layer;

wherein the oxidized third epitaxial layer underlies a gate on the channel region and the source/drain feature.

3. The method of claim 1 , further comprising:

removing the second epitaxial layers from the first stack in the channel region of the first fin to form another gap; and

forming a gate structure over the first epitaxial layers in the channel region, wherein the gate structure is disposed over top, bottom and opposing lateral sides of the first epitaxial layer.

4. The method of claim 1 , wherein covering the portion of the first epitaxial layers with the dielectric layer and filling the first gaps with the dielectric material includes:

forming the dielectric layer over the first stack; and

removing the dielectric layer from a top surface and sidewall surfaces of the first stack.

5. The method of claim 1 , further comprising:

forming a second fin extending from the substrate, the second fin having a source/drain region and a channel region, wherein the second fin is formed of a second stack of epitaxial layers that includes first epitaxial layers having the first composition interposed by second epitaxial layers having the second composition;

removing the second epitaxial layers from the source/drain region of the second fin to form second gaps;

covering a lower portion of the second stack with the dielectric layer and filling the second gaps in an upper portion of the second stack with the dielectric material, the upper portion of the second stack includes different amount of first epitaxial layers than an upper portion of the first stack; and

growing another epitaxial material on at least two surfaces of each of the first epitaxial layers to form a second source/drain feature while the dielectric material is filling the second gaps.

6. The method of claim 5 , wherein covering the lower portion of the second stack with the dielectric layer and filling the second gaps in the upper portion of the second stack with the dielectric material includes:

forming the dielectric layer over the second stack during covering the portion of the first epitaxial layers with the dielectric layer and filling the first gaps with the dielectric material; and

removing the dielectric layer from a top surface and sidewalls of the upper portion of the second stack during removing the dielectric layer from the top surface and sidewalls of the upper portion of the first stack.

7. The method of claim 5 , wherein covering the lower portion of the second stack with the dielectric layer and filling the second gaps in the upper portion of the second stack with the dielectric material includes removing the dielectric layer from a top surface and sidewalls of the upper portion of the second stack while covering the first stack with another hard mask.

8. The method of claim 1 , wherein the first composition includes silicon and the second composition includes silicon germanium.

9. A method comprising:

forming a first fin extending from a substrate, the first fin having a first source and drain region and a first channel region, wherein the first fin includes a first stack of epitaxial layers that includes first epitaxial layers having a first composition interposed by second epitaxial layers having a second composition;

forming a second fin extending from the substrate, the second fin having a second source and drain region and a second channel region, wherein the second fin includes a second stack of epitaxial layers that includes first epitaxial layers having the first composition interposed by second epitaxial layers having the second composition;

removing the second epitaxial layers from the first source/drain region to form first gaps and from the second source/drain region to form second gaps;

covering a lower portion of the first stack with a dielectric layer and filling the first gaps in an upper portion of the first stack with the dielectric material;

covering a lower portion of the second stack with the dielectric layer and filling the second gaps in an upper portion of the second stack with the dielectric material; and

growing another epitaxial material on at least two surfaces of each of the first epitaxial layers to form a first source/drain feature and a second source/drain feature, respectively, while the dielectric material fills the first gaps and second gaps, wherein the another epitaxial material physically contacts the at least two surfaces of each of the first epitaxial layers.

10. The method of claim 9 , further comprising:

forming a third epitaxial layer underlying the first epitaxial layers of the first fin; and

oxidizing the third epitaxial layer to form an oxidized third epitaxial layer.

11. The method of claim 9 , further comprising:

removing the second epitaxial layers from the first stack in the first channel region and the second stack in the second channel region to form another gaps; and

forming gate structures over the first epitaxial layers in the another gaps, wherein the gate structures are disposed over top, bottom and opposing lateral sides of the first epitaxial layers in the first and second channel regions.

12. The method of claim 9 , wherein covering the lower portion of the first stack with the dielectric layer and filling the gaps in the upper portion of the first stack with the dielectric material includes:

forming the dielectric layer over the first stack; and

removing the dielectric layer from a top surface and sidewalls of the upper portion of the first stack.

13. The method of claim 12 , wherein covering the lower portion of the second stack with the dielectric layer and filling the second gaps in the upper portion of the second stack with the dielectric material includes:

forming the dielectric layer over the second stack during forming the dielectric layer over the first stack;

removing the dielectric layer from a top surface and sidewalls of the upper portion of the second stack during removing the dielectric layer from the top surface and sidewalls of the upper portion of the first stack; and

etching back further the dielectric layer from sidewalls of the upper portion of the second stack while covering the first stack with a hard mask.

14. The method of claim 12 , wherein covering the lower portion of the second stack with the dielectric layer and filling the second gaps in the upper portion of the second stack with the dielectric material includes:

forming the dielectric layer over the second stack during forming the dielectric layer over the first stack;

covering the second stack with a hard mask while removing the dielectric layer from the top surface and sidewalls of the upper portion of the first stack; and

removing the dielectric layer from a top surface and sidewalls of the upper portion of the second stack while covering the first stack with another hard mask.

15. The method of claim 9 , wherein the first composition includes silicon and the second composition includes silicon germanium.

16. The method of claim 9 , further comprising:

forming a third fin extending from the substrate, the third fin having a third source/drain region and a third channel region, wherein the third fin includes a third stack of epitaxial layers that includes first epitaxial layers having the first composition interposed by second epitaxial layers having the second composition;

removing the second epitaxial layers from the third stack in the third channel region in the third stack to form another gaps;

forming an input/output dielectric layer over the first epitaxial layers in the another gaps, wherein the input/output dielectric layer is disposed over top, bottom and opposing lateral sides of the first epitaxial layers in the third channel region; and

forming gate structures over the input/output dielectric layer.

17. The method of claim 16 , further comprising:

removing the second epitaxial layers from the third source/drain region to form third gaps; and

growing another epitaxial material on at least two surfaces of each of the first epitaxial layers in the third source/drain region to form a third source/drain feature.

18. A method comprising:

forming a first fin extending from a substrate, the first fin having a first source/drain region and a first channel region, wherein the first fin includes a first semiconductor layer, a second semiconductor layer formed over the first semiconductor layer, and a third semiconductor layer formed over the second semiconductor layer;

forming a second fin extending from the substrate, the second fin having a second source/drain region and a second channel region, wherein the second fin includes a fourth semiconductor layer, a fifth semiconductor layer formed over the fourth semiconductor layer, and a sixth semiconductor layer formed over the fifth semiconductor layer;

oxidizing the first semiconductor layer to form an oxidized first semiconductor layer and oxidizing the fourth semiconductor layer to form an oxidized fourth semiconductor layer;

removing the second semiconductor layer from the first source/drain region to form a first gap and removing the fifth semiconductor layer from the second source/drain region to form a second gap;

forming a dielectric layer in the first and second gaps; and

forming a seventh semiconductor layer over the third semiconductor layer in the first source/drain region without extending to the oxidized first semiconductor layer and over the sixth semiconductor layer in the second source/drain region such that the seventh semiconductor layer extends to the oxidized fourth semiconductor layer, wherein the seventh semiconductor layer physically contacts the third semiconductor layer.

19. The method of claim 18 , wherein forming the dielectric layer in the first gap includes forming the dielectric directly on a sidewall surface of the oxidized first semiconductor layer.

20. The method of claim 18 , wherein the first semiconductor layer is formed of the same material as the third semiconductor layer.