IP Library Granted Patent US 9,950,924
Granted Patent B2
US 9,950,924 · App. 14/985,388 · Granted Apr 24, 2018

Methods and structures of integrated MEMS-CMOS devices

Inventors: Sudheer S. Sridharamurthy (Menlo Park, CA); Te-Hse Terrence Lee (San Jose, CA); Ali J. Rastegar (Palo Alto, CA); Mugurel Stancu (San Jose, CA); Xiao Charles Yang (Cupertino, CA)
Assignee: mCube, Inc.
B81C1/00801B81B3/0013B81B3/0086B81B7/0022B81B7/0064B81C1/00238H01L27/0688B81B2203/0163B81B2207/094B81C2201/0132B81C2201/05B81C2203/0735
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Quick Facts
Patent No.
US 9,950,924
App. No.
14/985,388
Granted
Apr 24, 2018
Kind
B2
Abstract

A method for fabricating an integrated MEMS-CMOS device uses a micro-fabrication process that realizes moving mechanical structures (MEMS) on top of a conventional CMOS structure by bonding a mechanical structural wafer on top of the CMOS and etching the mechanical layer using plasma etching processes, such as Deep Reactive Ion Etching (DRIE). During etching of the mechanical layer, CMOS devices that are directly connected to the mechanical layer are exposed to plasma. This sometimes causes permanent damage to CMOS circuits and is termed Plasma Induced Damage (PID). Embodiments of the present invention presents methods and structures to prevent or reduce this PID and protect the underlying CMOS circuits by grounding and providing an alternate path for the CMOS circuits until the MEMS layer is completely etched.

Claims (15)

1. A method for fabricating an integrated MEMS-CMOS device comprising:

providing a substrate having a surface region;

forming a CMOS IC layer overlying the surface region, the CMOS IC layer having at least one CMOS electrode coupled to an ESD diode;

forming a mechanical structural layer overlying the CMOS IC layer;

forming at least one MEMS device overlying the CMOS IC layer from a first portion of the mechanical structural layer, the at least one MEMS devices having at least one MEMS electrode;

forming a protection structure from a second portion of the mechanical structural layer, the protection structure including one or more ground posts and a jumper, wherein the protection structure is coupled to the at least one MEMS electrode and the at least one CMOS electrode through the jumper, wherein the protection structure is configured to couple the CMOS electrode to electrical ground through the one or more ground posts; and

etching the mechanical structural layer to separate the one or more ground posts from the jumper, wherein the CMOS electrode is connected to the electrical ground until the mechanical structural layer is completely etched.

2. The method of claim 1 wherein the ESD diode is coupled to the at least one CMOS electrode.

3. The method of claim 1 wherein the jumper is coupled the at least one MEMS electrode and the at least one CMOS electrode.

4. The method of claim 3 wherein the at least one MEMS electrode and the at least one CMOS electrode are electrically coupled via the jumper after the forming of the at least one MEMS device.

5. The method of claim 1 further comprising forming an electrode ground ring structure overlying the at least one CMOS device, the electrode ground ring structure being coupled to ground and the at least one CMOS device.

6. The method of claim 5 wherein the electrode ground ring structure is configured to direct plasma induced charge from a plasma etching process to ground.

7. The method of claim 1 wherein the forming of the mechanical structural layer, the at least one MEMS device, and the protection structure comprises a plasma etching process.

8. The method of claim 1 wherein the protection structure is configured to direct plasma induced charge from a plasma etching process to ground.

9. The method of claim 1 wherein the one or more MEMS devices comprises an inertial sensor, an accelerometer, a gyrometer, a magnetic field sensor, a pressure sensor, a humidity sensor, a temperature sensor, a chemical sensor, or a biosensor.

Assignments (5)
PARTIAL TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS AT REEL/FRAME NO. 61948/0764 Recorded May 2, 2025
From: WILMINGTON SAVINGS FUND SOCIETY, FSB, AS AGENT
To: MOVELLA INC.
Reel/Frame 071161/0930 →
NOTICE OF GRANT OF SECURITY INTEREST IN PATENTS Recorded Nov 15, 2022
From: MOVELLA INC.
To: WILMINGTON SAVINGS FUND SOCIETY, FSB, AS AGENT
Reel/Frame 061948/0764 →
RELEASE OF SECURITY INTEREST Recorded Nov 14, 2022
From: SILICON VALLEY BANK
To: MOVELLA INC. (FORMERLY KNOWN AS MCUBE, INC.)
Reel/Frame 061763/0864 →
SECURITY INTEREST Recorded Mar 2, 2022
From: MOVELLA INC. (FKA MCUBE, INC.)
To: SILICON VALLEY BANK
Reel/Frame 059147/0471 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 28, 2017
From: SRIDHARAMURTHY, SUDHEER S.; LEE, TE-HSE TERRENCE; RASTEGAR, ALI J.; STANCU, MUGUREL; YANG, XIAO CHARLES
To: MCUBE, INC.
Reel/Frame 044502/0196 →
Continuity (4)
Division 13788503 · Mar 7, 2013
Provisional Application 61609248 · Mar 9, 2012
Provisional Application 61745496 · Dec 21, 2012
Related Publication 20160176708A1 · Jun 23, 2016