IP Library Granted Patent US 10,684,900
Granted Patent B2
US 10,684,900 · App. 14/994,446 · Granted Jun 16, 2020

Enhanced message control banks

Inventors: Edward J Kujawa (Roseville, MN); Brian L McElmurry (Roseville, MN); Joseph P Peterson (Roseville, MN); Sandra G Wierdsma (Roseville, MN); Jerome G Strobeck (Rosevile, MN)
Assignee: Unisys Corporation
G06F9/544
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Quick Facts
Patent No.
US 10,684,900
App. No.
14/994,446
Granted
Jun 16, 2020
Kind
B2
Abstract

A server system may be configured to access a first contiguous portion of memory for a first activity of a plurality of activities, and to transfer data associated with the first activity into the first contiguous portion of memory. The first contiguous portion of memory may be placed in a memory repository to make the first contiguous portion of memory available for access by at least a second activity of the plurality of activities, and an identifier may be assigned to the first contiguous portion of memory placed in the memory repository. The server system may also be configured to access the first contiguous portion of memory for the second activity, and to transfer the data associated with the first activity from the first contiguous portion of memory to memory specifically associated with the second activity.

Claims (39)

1. A method for internal temporary storage, transfer, and sharing of message data, comprising:

accessing, by a server, a first contiguous portion of memory for a first thread of a first program of a plurality of executing programs;

transferring, by the server, data associated with the first thread into the first contiguous portion of memory;

placing, by the server, the first contiguous portion of memory in a memory repository that includes a plurality of contiguous portions of memory selectively accessible to the plurality of executing programs, to make the first contiguous portion of memory available for access by at least a second thread of a second program of the plurality of executing programs;

assigning, by the server, an identifier to the first contiguous portion of memory;

accessing, by the server, the first contiguous portion of memory for the second thread;

transferring, by the server, the data associated with the first thread from the first contiguous portion of memory to memory specifically associated with the second thread;

removing the data from the first contiguous portion of memory after the first contiguous portion of memory is accessed at least twice; and

rendering the first contiguous portion of memory unassigned after the data in the first contiguous portion of memory has been removed;

wherein the method is implemented in a fixed-gate shared subsystem.

2. The method of claim 1 , in which accessing the first contiguous portion of memory for the second thread comprises the second thread possessing the identifier and requesting access to the first contiguous portion of memory.

3. The method of claim 1 , in which the data transferred into the first contiguous portion of memory comprises a complete message.

4. A computer program product, comprising:

a non-transitory computer-readable medium comprising code to perform operations including:

accessing, by a server, a first contiguous portion of memory for a first thread of a first program of a plurality of executing programs;

transferring, by the server, data associated with the first thread into the first contiguous portion of memory;

placing, by the server, the first contiguous portion of memory in a memory repository that includes a plurality of contiguous portions of memory selectively accessible to the plurality of executing programs, to make the first contiguous portion of memory available for access by at least a second thread of a second program of the plurality of executing programs;

assigning, by the server, an identifier to the first contiguous portion of memory;

accessing, by the server, the first contiguous portion of memory for the second thread;

transferring, by the server, the data associated with the first thread from the first contiguous portion of memory to memory specifically associated with the second thread;

removing the data from the first contiguous portion of memory after the first contiguous portion of memory is accessed at least twice; and

rendering the first contiguous portion of memory unassigned after the data in the first contiguous portion of memory has been removed;

wherein the computer program product comprises a fixed-gate shared subsystem.

5. The computer program product of claim 4 , in which accessing the first contiguous portion of memory for the second thread comprises the second thread possessing the identifier and requesting access to the first contiguous portion of memory.

6. The computer program product of claim 4 , in which the data transferred into the first contiguous portion of memory comprises a complete message.

7. An apparatus, comprising:

a memory; and

a processor coupled to the memory, in which the processor is configured to execute operations including:

accessing, by a server, a first contiguous portion of memory for a first thread of a first program of a plurality of executing programs;

transferring, by the server, data associated with the first thread into the first contiguous portion of memory;

placing, by the server, the first contiguous portion of memory in a memory repository that includes a plurality of contiguous portions of memory selectively accessible to the plurality of executing programs, to make the first contiguous portion of memory available for access by at least a second thread of a second program of the plurality of executing programs;

assigning, by the server, an identifier to the first contiguous portion of memory;

accessing, by the server, the first contiguous portion of memory for the second thread;

transferring, by the server, the data associated with the first thread from the first contiguous portion of memory to memory specifically associated with the second thread;

removing the data from the first contiguous portion of memory after the first contiguous portion of memory is accessed at least twice; and

rendering the first contiguous portion of memory unassigned after the data in the first contiguous portion of memory has been removed;

wherein the apparatus comprises a fixed-gate shared subsystem.

8. The apparatus of claim 7 , in which accessing the first contiguous portion of memory for the second thread comprises the second thread possessing the identifier and requesting access to the first contiguous portion of memory.

9. The apparatus of claim 7 , in which the data transferred into the first contiguous portion of memory comprises a complete message.

Assignments (7)
AMENDED AND RESTATED PATENT SECURITY AGREEMENT Recorded Jun 27, 2025
From: UNISYS CORPORATION; UNISYS HOLDING CORPORATION; UNISYS NPL, INC.; UNISYS AP INVESTMENT COMPANY I
To: COMPUTERSHARE TRUST COMPANY, N.A., AS COLLATERAL TRUSTEE
Reel/Frame 071759/0527 →
RELEASE OF SECURITY INTEREST Recorded Oct 28, 2020
From: WELLS FARGO BANK, NATIONAL ASSOCIATION
To: UNISYS CORPORATION
Reel/Frame 054231/0496 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 4, 2020
From: KUJAWA, EDWARD J; MCELMURRY, BRIAN L; PETERSON, JOSEPH P; STROBECK, JEROME G; WIERDSMA, SANDRA G
To: UNISYS CORPORATION
Reel/Frame 052009/0071 →
RELEASE OF SECURITY INTEREST Recorded Nov 9, 2017
From: WELLS FARGO BANK, NATIONAL ASSOCIATION
To: UNISYS CORPORATION
Reel/Frame 044416/0114 →
SECURITY INTEREST Recorded Oct 6, 2017
From: UNISYS CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 044144/0081 →
PATENT SECURITY AGREEMENT Recorded Apr 27, 2017
From: UNISYS CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL TRUSTEE
Reel/Frame 042354/0001 →
SECURITY INTEREST Recorded Jun 3, 2016
From: UNISYS CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 038792/0820 →
Continuity (1)
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