IP Library Granted Patent US 10,355,006
Granted Patent B2
US 10,355,006 · App. 15/000,646 · Granted Jul 16, 2019

Semiconductor storage device and manufacturing method thereof

Inventors: Ryota Fujitsuka (Yokkaichi, JP); Nobuhito Kuge (Yokkaichi, JP); Kensei Takahashi (Kuwana, JP)
Assignee: TOSHIBA MEMORY CORPORATION
H01L27/11524H01L21/76829H01L21/76832H01L27/11582H01L29/4991H01L21/7682H01L21/76805H01L21/76807
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Quick Facts
Patent No.
US 10,355,006
App. No.
15/000,646
Granted
Jul 16, 2019
Kind
B2
Abstract

A semiconductor storage device according to an embodiment includes a plurality of memory cells, a first film, and a second film. The memory cells are placed at intervals in a first direction on a semiconductor substrate. The first film is placed continuously in the first direction above the memory cells so as to cover all of the memory cells and including mainly metal oxide. The second film is placed on the first film and including mainly silicon nitride or silicon dioxide.

Claims (11)

1. A semiconductor storage device comprising:

a plurality of memory cells placed at intervals in a first direction on a semiconductor substrate;

selection gates placed at intervals from the memory cells in the first direction on the semiconductor substrate;

an insulating film placed above the memory cells and the selection gates;

a metal oxide film placed continuously in the first direction above the memory cells and the selection gates so as to cover the memory cells and the selection gates, the metal oxide film being on the insulating film, and the metal oxide film comprising mainly metal oxide;

an interlayer dielectric film placed on the metal oxide film; and

contact plugs placed at intervals from the selection gates in the first direction on the semiconductor substrate and connecting the selection gates to signal lines, respectively, wherein

the metal oxide film is located from an upper side of the memory cells to positions of the contact plugs on the semiconductor substrate, and the metal oxide film is used as an etching stopper for processing the contact plugs,

the metal oxide film is provided around trenches of the interlayer dielectric film, with the contact plugs provided in the trenches, is in contact with a lower portion of the contact plugs, and is formed directly on a tunnel oxide film around areas where the contact plugs are in contact with the semiconductor substrate, and

the metal oxide film is provided apart from a silicon nitride film formed directly on a diffusion layer provided in the semiconductor substrate.

2. The device of claim 1 , wherein the metal oxide film has oxide of at least one element of Al, Hf, Ti, Ta, Nb, Ce, La, Y, and Zr, or compound oxide of the at least one element and silicon dioxide.

Assignments (5)
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 29, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043052/0218 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2016
From: FUJITSUKA, RYOTA; KUGE, NOBUHITO; TAKAHASHI, KENSEI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 037523/0865 →
Continuity (2)
Provisional Application 62215496 · Sep 8, 2015
Related Publication 20170069534A1 · Mar 9, 2017