IP Library Granted Patent US 9,972,738
Granted Patent B2
US 9,972,738 · App. 15/004,116 · Granted May 15, 2018

Solar cell and method for manufacturing the same

Inventors: Goohwan Shim (Seoul, KR); Changseo Park (Seoul, KR); Philwon Yoon (Seoul, KR); Yoonsil Jin (Seoul, KR); Jinsung Kim (Seoul, KR); Youngho Choe (Seoul, KR); Jaewon Chang (Seoul, KR)
Assignee: LG ELECTRONICS INC.
H01L31/18H01L31/02168H01L31/022425H01L31/068H01L31/0684Y02E10/547
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Quick Facts
Patent No.
US 9,972,738
App. No.
15/004,116
Granted
May 15, 2018
Kind
B2
Abstract

A solar cell and a method for manufacturing the same are discussed. The solar cell may include a substrate, an emitter layer positioned at a first surface of the substrate, a first anti-reflection layer that is positioned on a surface of the emitter layer and may include a plurality of first contact lines exposing a portion of the emitter layer, a first electrode that is electrically connected to the emitter layer exposed through the plurality of first contact lines and may include a plating layer directly contacting the emitter layer, and a second electrode positioned on a second surface of the substrate.

Claims (34)

1. A method for manufacturing a solar cell, the method comprising:

forming an emitter layer on a first surface of a substrate;

forming a back surface field layer on a second surface opposite the first surface of the substrate;

forming a first anti-reflection layer on the emitter layer;

forming a second anti-reflection layer on the back surface field layer;

forming a plurality of first contact regions on the first anti-reflection layer and a plurality of second contact regions on the second anti-reflection layer, the plurality of first contact regions and the plurality of second contact regions being formed by removing the first anti-reflection layer and the second anti-reflection layer using a laser thereby exposing portions of the emitter layer and the back surface field layer;

forming a first electrode and a second electrode at the same time,

wherein the forming of the first electrode and the second electrode at the same time includes:

forming a first metal seed layer on the emitter layer exposed through the plurality of first contact regions and a second metal seed layer on the back surface field layer exposed through the plurality of second contact regions by a vacuum method, a sputtering method or an electron beam evaporation method, the first metal seed layer directly contacting the emitter layer and the second metal seed layer directly contacting the back surface field layer,

forming a first copper layer having a first thickness on the first metal seed layer and a second copper layer having the first thickness on the second metal seed layer, and

forming a first tin layer having a second thickness smaller than the first thickness on the first copper layer and a second tin layer having the second thickness on the second copper layer.

2. The method of claim 1 , wherein each of the plurality of first contact regions and the plurality of second contact regions includes a plurality of lines.

3. The method of claim 1 , wherein each of the first anti-reflection layer and the second anti-reflection layer is silicon nitride (SiNx).

4. The method of claim 1 , wherein a plane area of each of the plurality of first contact regions is about 2% to 6% of a plane area of the emitter layer.

5. The method of claim 1 , wherein a plane area of each of the plurality of second contact regions is about 5% to 15% of a plane area of the back surface field layer.

6. The method of claim 1 , wherein the first surface of the substrate is textured.

7. The method of claim 1 , wherein each of the plurality of first contact regions has a width of 20 μm to 60 μm.

8. The method of claim 1 , wherein each of the first electrode and the second electrode has a thickness of 20 μm to 50 μm.

9. The method of claim 1 , wherein the first thickness of the first or second copper layer is 10 μm to 30 μm.

10. The method of claim 1 , wherein the second thickness of the first or second tin layer is 5 μm to 15 μm.

11. The method of claim 1 , wherein the first anti-reflection layer and the second anti-reflection layer are formed of different layers.

12. The method of claim 11 , wherein the first anti-reflection layer includes a silicon nitride layer, and a silicon oxide layer or an aluminum oxide layer positioned between the emitter layer and the silicon nitride layer.

13. The method of claim 11 , wherein the second anti-reflection layer includes a silicon nitride layer.

14. The method of claim 1 , wherein the forming of the first anti-reflection layer includes sequentially stacking an oxide layer and a silicon nitride layer.

15. The method of claim 14 , wherein the oxide layer is an aluminum oxide layer or a silicon oxide layer.

16. The method of claim 1 , further comprising, before the emitter layer and the back surface field layer are formed, texturing the first surface and the second surface of the substrate to form a first textured surface and a second textured surface, respectively.

17. The method of claim 1 , wherein the forming of the emitter layer, the forming of the first anti-reflection layer, the forming of the back surface field layer and the forming of the second anti-reflection layer include:

forming the back surface field layer at each of a front surface and a back surface of the substrate;

forming the second anti-reflection layer on a back surface of the back surface field layer at the back surface of the substrate;

removing the back surface field layer positioned on the front surface of the substrate;

forming the emitter layer on the front surface of the substrate; and

forming the first anti-reflection layer on a front surface of the emitter layer.

18. The method of claim 17 , wherein the forming of the first anti-reflection layer includes sequentially stacking an oxide layer and a silicon nitride layer.

19. The method of claim 1 , wherein the forming of the first electrode and the second electrode at the same time further includes forming a diffusion barrier layer between the first metal seed layer and the first copper layer, or between the second metal seed layer and the second copper layer.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 19, 2024
From: SHANGRAO XINYUAN YUEDONG TECHNOLOGY DEVELOPMENT CO. LTD.
To: TRINA SOLAR CO., LTD.
Reel/Frame 066831/0802 →
CHANGE OF NAME Recorded Dec 19, 2023
From: SHANGRAO JINKO SOLAR TECHNOLOGY DEVELOPMENT CO., LTD
To: SHANGRAO XINYUAN YUEDONG TECHNOLOGY DEVELOPMENT CO. LTD
Reel/Frame 066078/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 7, 2022
From: SHIM, GOOHWAN; PARK, CHANGSEO; YOON, PHILWON; JIN, YOONSIL; KIM, JINSUNG; CHOE, YOUNGHO; CHANG, JAEWON
To: LG ELECTRONICS INC.
Reel/Frame 061668/0884 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 29, 2022
From: LG ELECTRONICS INC.
To: SHANGRAO JINKO SOLAR TECHNOLOGY DEVELOPMENT CO., LTD
Reel/Frame 061572/0487 →
Priority Claims (1)
KR 10-2010-0086464 · Sep 3, 2010 · national
Continuity (3)
Continuation 14146561 · Jan 2, 2014
Continuation 13640713
Related Publication 20160155885A1 · Jun 2, 2016