IP Library Granted Patent US 9,692,304
Granted Patent B1
US 9,692,304 · App. 15/007,570 · Granted Jun 27, 2017

Integrated power stage device with offset monitor current for sensing a switch node output current

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Quick Facts
Patent No.
US 9,692,304
App. No.
15/007,570
Granted
Jun 27, 2017
Kind
B1
Abstract

An integrated power stage device includes a switch node that is coupled to an output inductor. The integrated power stage device generates a monitor current that is a scaled version of the current through the output inductor. The integrated power stage device outputs a single-ended offset monitor current that is equal to the monitor current plus a DC offset current. A PWM controller senses the current through the output inductor by receiving a monitor voltage that is developed from the offset monitor current. The PWM controller generates a PWM signal in accordance with the sensed output inductor current to control a switching operation of a power switch of the integrated power stage device.

Claims (44)

1. A power supply comprising:

a first integrated power stage device comprising a power switch and a switch driver, the first integrated power stage device including a switch node that is coupled to a first output inductor and is configured to output a single-ended first current that is equal to a second current plus a first direct current (DC) offset current, the second current being a scaled version of a current through the first output inductor; and

a pulse-width modulation (PWM) controller that is external to the first integrated power stage device, the PWM controller being configured to receive a first monitor voltage developed from the single-ended first current to sense the current through the first output inductor and is configured to output a first PWM signal to control switching of the power switch of the first integrated power stage device in accordance with the current through the first output inductor as indicated by the first monitor voltage,

wherein the PWM controller is configured to receive a second monitor voltage developed from a single-ended third current that is output by a second integrated power stage device to sense a current through a second output inductor coupled to a switch node of the second integrated power stage device, and to output a second PWM signal to control a power switch of the second integrated power stage device in accordance with the current through the second output inductor as indicated by the second monitor voltage,

wherein the second integrated power stage device is external to the PWM controller and the single-ended third current is equal to a fourth current plus a second DC offset current, the fourth current being a scaled version of the current through the second output inductor.

2. The power supply of claim 1 , wherein the power supply is a multi-phase power supply and each of the first and second integrated power stage devices corresponds to an output phase of the multi-phase power supply.

3. The power supply of claim 1 , wherein the first monitor voltage, when the current through the first output inductor is zero, is equal to a product of the first DC offset current and a resistance of a resistor on which the first monitor voltage is developed.

4. The power supply of claim 1 , wherein the first integrated power stage device further comprises a DC current source that generates the first DC offset current.

5. A method of operating a power supply, the method comprising:

receiving, in a first integrated power stage device, a first switch control signal from an external switch controller;

controlling a switching operation of a power switch of the first integrated power stage device in accordance with the first switch control signal;

sensing an output current of the first integrated power stage device to generate a first monitor current that is indicative of the output current of the first integrated power stage device;

adding a DC offset to the first monitor current to generate a first offset monitor current;

providing the first offset monitor current to the external switch controller;

generating, by the external switch controller, the first switch control signal based on the output current of the first integrated power stage device as indicated by the first offset monitor current,

receiving, in a second integrated power stage device, a second switch control signal from the external switch controller;

controlling a switching operation of a power switch of the second integrated power stage device in accordance with the second switch control signal;

sensing an output current of the second integrated power stage device to generate a second monitor current that is indicative of the output current of the second integrated power stage device;

adding a DC offset to the second monitor current to generate a second offset monitor current;

providing the second offset monitor current to the external switch controller; and

generating, by the external switch controller, the second switch control signal based on the output current of the second integrated power stage device as indicated by the second offset monitor current.

6. The method of claim 5 , wherein the external switch controller comprises a pulse width modulation (PWM) controller and the first switch control signal comprises a PWM signal.

7. The method of claim 5 , further comprising:

developing a monitor voltage using the first offset monitor current,

wherein the external switch controller detects the output current of the first integrated power stage device from the monitor voltage.

8. The method of claim 7 , wherein the monitor voltage is equal to a product of the first offset monitor current and a resistance of a resistor on which the monitor voltage is developed when the output current of the first integrated power stage device is zero.

9. The method of claim 5 , wherein the power supply comprises a multi-phase power supply and each of the first and second integrated power stage devices outputs a phase of the multi-phase power supply.

10. The method of claim 5 , wherein each of the first and second offset monitor currents is a single-ended current signal that is referenced to signal ground.

11. An integrated power stage device that is an integrated circuit with a plurality of pins, the integrated power stage device comprising:

a first pin in the plurality of pins, the first pin being configured to receive a switch control signal from an external switch controller;

a power switch;

a switch driver that is configured to drive the power switch in accordance with the switch control signal to generate an output current at a switch node;

a second pin in the plurality of pins, the second pin being configured to be is coupled to the switch node; and

a third pin in the plurality of pins, the third pin being configured to output an offset monitor current, the offset monitor current comprising a DC offset plus a monitor current that is indicative of the output current, the third pin being configured to be coupled to one of a plurality of current sense input pins of the external switch controller.

12. The integrated power stage device of claim 11 , wherein the external switch controller comprises a pulse width modulation (PWM) controller, and the first pin is coupled to a PWM signal output of the PWM controller.

13. The integrated power stage device of claim 11 , wherein the switch control signal is a PWM signal.

14. The integrated power stage device of claim 11 , wherein the third pin is coupled to a resistor, the offset monitor current develops a monitor voltage on the resistor, and the switch control signal is generated by the external switch controller based on the output current as indicated by the monitor voltage.

15. The integrated power stage device of claim 11 , further comprising:

a DC offset generator that generates the DC offset.

16. The integrated power stage device of claim 15 , wherein the DC offset generator comprises a DC current source.

17. The integrated power stage device of claim 11 , further comprising:

a fourth pin in the plurality of pins, the fourth pin being configured to receive an input voltage, and

wherein the switch node is on a source of the power switch and a drain of the power switch is connected to the fourth pin.

18. The integrated power stage device of claim 11 , wherein the power switch comprises a MOSFET.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT RECORDED AT REEL 046410, FRAME 0933 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064072/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 3, 2021
From: FAIRCHILD SEMICONDUCTOR CORPORATION
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 057694/0374 →
PATENT SECURITY AGREEMENT Recorded Jun 22, 2018
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 046410/0933 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 12, 2016
From: LUO, JO; GLADISH, JON
To: FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 037723/0141 →