IP Library Granted Patent US 9,722,599
Granted Patent B1
US 9,722,599 · App. 15/009,438 · Granted Aug 1, 2017

Driver for the high side switch of the cascode switch

Inventors: Mladen Ivankovic (Oakville, CA); Fred Sawyer (Foxboro, MA)
Assignee: INFINEON TECHNOLOGIES AUSTRIA AG
H03K17/567H03K7/08H03K17/223H03K17/691H03K17/74H03K2017/226
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Quick Facts
Patent No.
US 9,722,599
App. No.
15/009,438
Granted
Aug 1, 2017
Kind
B1
Abstract

In accordance with an embodiment, a circuit includes a first and a second switching transistors configured to be coupled in series between a first reference voltage terminal and a transformer. The circuit also includes a first diode coupled between a first drain of the first switching transistor and a first input terminal. The first diode is configured to clamp a voltage of the first drain to a voltage of the first input terminal. The circuit further includes a switching circuit coupled between the second switching transistor and the first input terminal. The switching circuit is configured to connect a second source of the second switching transistor to a second gate of the second switching transistor when a voltage of the second source exceeds the voltage of the first input terminal.

Claims (50)

1. A circuit comprising:

a first switching transistor comprising a first source coupled to a first reference voltage terminal;

a second switching transistor comprising a second source coupled to a first drain of the first switching transistor, and a second drain configured to be coupled to a transformer;

a first diode coupled between the first drain of the first switching transistor and a first input terminal, wherein the first diode is configured to clamp a voltage of the first drain of the first switching transistor to a voltage of the first input terminal; and

a switching circuit coupled between the second switching transistor and the first input terminal, wherein the switching circuit is configured to connect the second source of the second switching transistor to a second gate of the second switching transistor when a voltage of the second source of the second switching transistor exceeds the voltage of the first input terminal.

2. The circuit of claim 1 , wherein the switching circuit comprises:

a third transistor having a first terminal coupled to the second gate of the second switching transistor, and having a second terminal coupled to the second source of the second switching transistor; and

a first resistor and a second diode coupled in series between a third terminal of the third transistor and the first input terminal.

3. The circuit of claim 2 , wherein the third transistor is a bipolar junction transistor (BJT), the first terminal is an emitter of the BJT, the second terminal is a collector of the BJT, and the third terminal is a base of the BJT.

4. The circuit of claim 3 , further comprising:

a third diode coupled between the base and the emitter of the BJT; and

a fourth diode coupled between the third diode and a first voltage terminal.

5. The circuit of claim 4 , further comprising a DC voltage source coupled to the first voltage terminal.

6. The circuit of claim 4 , further comprising a pulse width modulator coupled to the first voltage terminal.

7. The circuit of claim 4 , further comprising a first driver circuit coupled to a first gate of the first switching transistor.

8. The circuit of claim 7 , wherein the first driver circuit comprises a resistor.

9. The circuit of claim 7 , further comprising a pulse width modulator coupled to the first driver circuit.

10. The circuit of claim 3 , further comprising a second resistor coupled between the second gate of the second switching transistor and the emitter of the BJT.

11. The circuit of claim 10 , further comprising a third resistor coupled between the emitter of the BJT and the first input terminal.

12. The circuit of claim 11 , further comprising a start-up cell coupled to the second source of the second switching transistor.

13. The circuit of claim 1 , wherein the first switching transistor and the second switching transistor are different types of transistors.

14. The circuit of claim 1 , wherein a first one of the first and the second switching transistors is a metal-oxide-semiconductor field-effect transistor (MOSFET), and a second one of the first and the second switching transistors is a Gallium Nitride field-effect transistor (GaN FET).

15. The circuit of claim 1 , further comprising the transformer.

16. A circuit comprising:

a first switching transistor and a second switching transistor, wherein a drain of the first switching transistor is coupled to a source of the second switching transistor, a source of the first switching transistor is coupled to a reference voltage terminal, and a drain of the second switching transistor is configured to be coupled to a first terminal of a primary winding of a transformer;

a first diode coupled between the drain of the first switching transistor and a second terminal of the primary winding, wherein the first diode is configured to limit a voltage at the drain of the first switching transistor to a pre-determined voltage;

a switching circuit coupled between the second switching transistor and the second terminal of the primary winding, wherein the switching circuit is configured to discharge a gate-source capacitor of the second switching transistor when the voltage at the drain of the first switching transistor is at the pre-determined voltage.

17. The circuit of claim 16 , wherein the switching circuit comprises:

a bipolar junction transistor (BJT) comprising an emitter coupled to a gate of the second switching transistor, and a collector coupled to the source of the second switching transistor; and

a first resistor and a second diode coupled in series between a base of the BJT and the second terminal of the primary winding.

18. The circuit of claim 17 , further comprising:

a third diode; and

a fourth diode, wherein the fourth diode and the third diode are coupled in series between the emitter of the BJT and a first voltage terminal.

19. The circuit of claim 18 , wherein the first voltage terminal is coupled to a DC voltage source.

20. The circuit of claim 18 , wherein the first voltage terminal is coupled to a pulse width modulator.

21. The circuit of claim 18 , further comprising a driver circuit coupled between a gate of the first switching transistor and a pulse width modulator.

22. The circuit of claim 17 , further comprising a second resistor coupled between the emitter of the BJT and the gate of the second switching transistor.

23. The circuit of claim 22 , further comprising a third resistor coupled between the emitter of the BJT and the second terminal of the primary winding.

24. The circuit of claim 23 , further comprising a start-up cell coupled to the source of the second switching transistor.

25. The circuit of claim 16 , wherein the first switching transistor and the second switching transistor have different voltage ratings.

26. The circuit of claim 16 , further comprising the transformer.

27. A method of switching a power circuit comprising:

turning off a first switching transistor, wherein the first switching transistor is coupled in series with a second switching transistor between a reference voltage and a primary winding of a transformer, wherein the second switching transistor is coupled between the primary winding and the first switching transistor;

clamping a voltage at a drain of the first switching transistor to a bus voltage provided to the primary winding; and

turning off the second switching transistor after the voltage at the drain of the first switching transistor is above a pre-determined threshold.

28. The method of claim 27 , wherein the clamping is performed by a diode coupled between the drain of the first switching transistor and the primary winding.

29. The method of claim 28 , wherein the turning off the second switching transistor comprises:

turning on a third transistor; and

discharging a gate-source capacitor of the second switching transistor through a conductive path comprising the third transistor, a resistor, and a second diode.

30. The method of claim 29 , wherein the third transistor is a bipolar junction transistor (BJT).

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 28, 2016
From: INFINEON TECHNOLOGIES AMERICAS CORP.
To: INFINEON TECHNOLOGIES AUSTRIA AG
Reel/Frame 040156/0564 →
MERGER AND CHANGE OF NAME Recorded Oct 24, 2016
From: INFINEON TECHNOLOGIES NORTH AMERICA CORP.; INTERNATIONAL RECTIFIER CORPORATION
To: INFINEON TECHNOLOGIES AMERICAS CORP.
Reel/Frame 040095/0795 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 28, 2016
From: IVANKOVIC, MLADEN; SAWYER, FRED
To: INFINEON TECHNOLOGIES NORTH AMERICA CORP.
Reel/Frame 037613/0612 →