IP Library Granted Patent US 9,647,000
Granted Patent B2
US 9,647,000 · App. 15/012,306 · Granted May 9, 2017

Display device

Inventor: Toshinari Sasaki (Tokyo, JP)
Assignee: Japan Display Inc.
H01L27/1225H01L27/124H01L27/326H01L27/3246H01L27/3251H01L27/3262H01L29/41733H01L29/42384H01L29/7869H01L29/78609H01L29/78696
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Quick Facts
Patent No.
US 9,647,000
App. No.
15/012,306
Granted
May 9, 2017
Kind
B2
Abstract

A display device includes a first electrode, a first insulating layer having a first top surface and a first side wall, the first side wall having a closed shape and being exposed to a first opening reaching the first electrode, an oxide semiconductor layer on the first side wall, the oxide semiconductor layer including a first portion and a second portion, the first portion being connected with the first electrode, a gate electrode facing the oxide semiconductor layer, a gate insulating layer between the oxide semiconductor layer and the gate electrode, a first transparent conductive layer above the first top surface, the first transparent conductive layer being connected with the second portion, and a second transparent conductive layer connected with the first transparent conductive layer, the second transparent conductive layer forming the same layer with the first transparent conductive layer.

Claims (29)

1. A display device, comprising:

a first electrode;

a first insulating layer having a first top surface and a first side wall, the first side wall having a closed shape and being exposed to a first opening reaching the first electrode;

an oxide semiconductor layer on the first side wall, the oxide semiconductor layer including a first portion and a second portion, the first portion being connected with the first electrode;

a gate electrode facing the oxide semiconductor layer;

a gate insulating layer between the oxide semiconductor layer and the gate electrode;

a first transparent conductive layer above the first top surface, the first transparent conductive layer being connected with the second portion; and

a second transparent conductive layer connected with the first transparent conductive layer, the second transparent conductive layer forming the same layer with the first transparent conductive layer.

2. The display device according to claim 1 , wherein the second transparent conductive layer is a pixel electrode to be supplied with a data signal corresponding to a gray scale of a pixel including the second transparent conductive layer.

3. The display device according to claim 2 , further comprising:

a fourth transparent conductive layer in a region different from that of at least the second transparent conductive layer as seen in a plan view, the fourth transparent conductive layer being supplied with a voltage different from that of the second transparent conductive layer; and

a second insulating layer between the second transparent conductive layer and the fourth transparent conductive layer.

4. The display device according to claim 2 , further comprising a third transparent conductive layer forming the same layer with the first transparent conductive layer and the second transparent conductive layer, the third transparent conductive layer facing the second transparent conductive layer as seen in a plan view and being supplied with a voltage different from that of the second transparent conductive layer.

5. The display device according to claim 3 , further comprising:

a gate line to be supplied with a gate voltage controlling a transistor including a channel formed of the oxide semiconductor layer to be on or off; and

a data line to be supplied with the data signal;

wherein:

the gate line is connected with the gate electrode;

the data line is connected with the first electrode; and

the transistor is located in a crossing area of the gate line and the data line.

6. The display device according to claim 5 , wherein the first side wall has a tapered inclining surface tending to open upward.

7. The display device according to claim 4 , further comprising:

a gate line to be supplied with a gate voltage controlling a transistor including a channel formed of the oxide semiconductor layer to be on or off; and

a data line to be supplied with the data signal;

wherein:

the gate line is connected with the gate electrode;

the data line is connected with the first electrode; and

the transistor is located in a crossing area of the gate line and the data line.

8. The display device according to claim 7 , wherein the first side wall has a tapered inclining surface tending to open upward.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 22, 2025
From: JAPAN DISPLAY INC.
To: MAGNOLIA WHITE CORPORATION
Reel/Frame 072130/0313 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 3, 2016
From: SASAKI, TOSHINARI
To: JAPAN DISPLAY INC.
Reel/Frame 037652/0308 →
Priority Claims (1)
JP 2015-023018 · Feb 9, 2015 · national
Continuity (1)
Related Publication 20160233251A1 · Aug 11, 2016