IP Library Granted Patent US 9,785,165
Granted Patent B2
US 9,785,165 · App. 15/014,320 · Granted Oct 10, 2017

Voltage regulator with improved line regulation transient response

Inventors: Sandor Petenyi (Milovice Nad Labem, CZ); Calogero Ribellino (Mascalucia, IT)
Assignees: STMicroelectronics Design and Application S.R.O.; STMicroelectronics S.r.l.
G05F1/575
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Quick Facts
Patent No.
US 9,785,165
App. No.
15/014,320
Granted
Oct 10, 2017
Kind
B2
Abstract

A significant reduction of the amplitude of the transient response is obtained by keeping a low dropout regulator circuit in a closed loop condition. This is achieved by manipulation of the reference voltage level when an open loop condition arises due to a falling input voltage. In this case, the reference voltage level is tracked with the input voltage level, keeping the output voltage regulated. As a consequence, the power pass element of the regulator is not forced into the linear region (in the case of a MOSFET) or deep saturation (in the case of a bipolar transistor).

Claims (62)

1. A voltage regulator circuit, comprising:

an input node configured to receive an input voltage;

a power transistor having a conduction path coupled between the input node and an output node;

an amplifier having an output driving a control terminal of the power transistor and a first input coupled to the output node to form a regulator feedback loop, said amplifier further having a second input; and

a voltage generator supplied by the input voltage and configured to generate a variable reference voltage applied to the second input of the amplifier, said variable reference voltage varying correspondingly with changes in the input voltage.

2. The voltage regulator circuit of claim 1 , further comprising:

a current sensing circuit configured to sense current flowing in the conduction path of the power transistor and generate a sense current at an intermediate node;

a first resistor coupled between the input node and the intermediate node; and

a first transistor having a conduction path coupled between the intermediate node and the second input of the amplifier.

3. The voltage regulator circuit of claim 2 , further comprising a low pass filter coupled between the first transistor and the second input of the amplifier.

4. The voltage regulator circuit of claim 2 , further comprising a zener diode coupled between the first transistor and a reference voltage node.

5. The voltage regulator circuit of claim 4 , wherein the reference voltage node is a ground node.

6. The voltage regulator circuit of claim 4 , further comprising:

a second transistor coupled to the first transistor to form a current mirroring circuit; and

a current source configured to supply a bias current to the second transistor.

7. The voltage regulator circuit of claim 2 , further comprising a bandgap reference voltage generator including said first transistor.

8. The voltage regulator circuit of claim 7 , wherein said bandgap reference voltage generator comprises:

a pair of MOSFET transistor coupled to the input node and configured in a current mirror relationship; and

a pair of bipolar transistors respectively coupled in series with the pair of MOSFET transistors;

wherein a series connect node between one of the pair of MOSFET transistors and one of the pair of bipolar transistors is coupled to a control terminal of the first transistor.

9. The voltage regulator circuit of claim 8 , wherein said bandgap reference voltage generator further comprises a resistive voltage divider circuit coupled between the first transistor and a reference voltage node, an output of the resistive voltage divider circuit coupled to control terminals of the pair of bipolar transistors.

10. The voltage regulator circuit of claim 9 , wherein the reference voltage node is a ground node.

11. The voltage regulator circuit of claim 2 , further comprising:

a bandgap reference voltage generator configured to generate a bandgap voltage;

a resistive voltage divider circuit coupled between the first transistor and a reference voltage node; and

an additional amplifier having an output driving a control terminal of the first transistor, a first input coupled to an output of the resistive voltage divider to form a feedback loop and a second input coupled to receive said bandgap voltage.

12. The voltage regulator circuit of claim 2 , wherein said current sensing circuit comprises a second transistor which is a scaled copy of the power transistor, said second transistor having a conduction path coupled between the intermediate node and the output node and having a control terminal coupled to the output of the amplifier.

13. A voltage regulator circuit, comprising:

an input node configured to receive an input voltage;

a power transistor having a conduction path coupled between the input node and an output node;

a current sensing circuit configured to sense current flowing in the conduction path of the power transistor and generate a sense current;

an amplifier having an output driving a control terminal of the power transistor and a first input coupled to the output node to form a regulator feedback loop, said amplifier further having a second input; and

a voltage generator supplied by the input voltage and configured to generate a variable reference voltage applied to the second input of the amplifier in response to said input voltage and the sense current.

14. The voltage regulator circuit of claim 13 , wherein the sense current is generated at an intermediate node, the voltage generator comprising:

a first resistor coupled between the input node and the intermediate node; and

a first transistor having a conduction path coupled between the intermediate node and the second input of the amplifier.

15. The voltage regulator circuit of claim 14 , further comprising:

a zener diode coupled between the first transistor and a reference voltage node;

a second transistor coupled to the first transistor to form a current mirroring circuit; and

a current source configured to supply a bias current to the second transistor.

16. The voltage regulator circuit of claim 14 , wherein the voltage generator circuit comprises a bandgap reference voltage generator including said first transistor.

17. The voltage regulator circuit of claim 14 , further comprising:

a bandgap reference voltage generator configured to generate a bandgap voltage;

a resistive voltage divider circuit coupled between the first transistor and a reference voltage node; and

an additional amplifier having an output driving a control terminal of the first transistor, a first input coupled to an output of the resistive voltage divider to form a feedback loop and a second input coupled to receive said bandgap voltage.

18. The voltage regulator circuit of claim 14 , wherein said current sensing circuit comprises a second transistor which is a scaled copy of the power transistor, said second transistor having a conduction path coupled between the intermediate node and the output node and having a control terminal coupled to the output of the amplifier.

19. A method for operating a voltage regulator circuit, comprising:

determining an error between a feedback voltage and a reference voltage;

driving a control terminal of a power transistor with a control voltage derived from the determined error to regulate an output voltage, wherein said feedback voltage is derived from the output voltage;

supplying an input voltage to the power transistor; and

decreasing said reference voltage correspondingly to a decrease in the input voltage so as to maintain the output voltage in regulation.

20. A method for operating a voltage regulator circuit, comprising:

determining an error between a feedback voltage and a reference voltage;

driving a control terminal of a power transistor with a control voltage derived from the determined error to regulate an output voltage, wherein said feedback voltage is derived from the output voltage;

generating a sense current corresponding to a current flowing through the power transistor; and

decreasing the reference voltage in response to change in the sense current so as to maintain the output voltage in regulation.

21. The voltage regulator circuit of claim 1 , wherein said variable reference voltage decreases in response to a decrease in the input voltage to a voltage level that will provide for a regulated voltage at said output node.

22. The voltage regulator circuit of claim 1 , wherein said variable reference voltage decreases in response to a decrease in the input voltage to a voltage level preventing the voltage regulator circuit from dropping out of regulation.

23. The voltage regulator circuit of claim 1 , wherein said variable reference voltage changes in response to changes in the input voltage so as to maintain the regulator feedback loop in a closed loop operating condition.

24. The voltage regulator circuit of claim 13 , wherein said variable reference voltage decreases in response to change in the sense current and a decrease in the input voltage to a voltage level that will provide for a regulated voltage at said output node.

25. The voltage regulator circuit of claim 13 , wherein said variable reference voltage decreases in response to change in the sense current and a decrease in the input voltage to a voltage level preventing the voltage regulator circuit from dropping out of regulation.

26. The voltage regulator circuit of claim 13 , wherein said variable reference voltage changes in response to changes in the sense current and input voltage so as to maintain the regulator feedback loop in a closed loop operating condition.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 16, 2022
From: STMICROELECTRONICS DESIGN AND APPLICATION S.R.O.
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 061796/0218 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 1, 2022
From: STMICROELECTRONICS S.R.L.
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 061828/0243 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 3, 2016
From: PETENYI, SANDOR
To: STMICROELECTRONICS DESIGN AND APPLICATION S.R.O.
Reel/Frame 037654/0578 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 3, 2016
From: RIBELLINO, CALOGERO
To: STMICROELECTRONICS S.R.L.
Reel/Frame 037654/0634 →
Continuity (1)
Related Publication 20170220058A1 · Aug 3, 2017