IP Library Granted Patent US 9,627,515
Granted Patent B2
US 9,627,515 · App. 15/025,389 · Granted Apr 18, 2017

Method of manufacturing thin-film transistor substrate

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Quick Facts
Patent No.
US 9,627,515
App. No.
15/025,389
Granted
Apr 18, 2017
Kind
B2
Abstract

A method of manufacturing a thin-film transistor substrate that includes a thin-film transistor having a semiconductor layer, includes: forming a CuMn alloy film (third conductive film) above a substrate; forming a first silicon oxide film (first insulation film) on the CuMn alloy film at a first temperature; forming an aluminum oxide film (second insulation film) on the first silicon oxide film; and forming a second silicon oxide film (third insulation film) on the aluminum oxide film at a second temperature higher than the first temperature.

Claims (40)

1. A method of manufacturing a thin-film transistor substrate that includes a thin-film transistor having a semiconductor layer, the method of manufacturing the thin-film transistor substrate comprising:

forming a CuMn alloy film above a substrate;

forming a first silicon oxide film on the CuMn alloy film at a first temperature;

forming an aluminum oxide film on the first silicon oxide film; and

forming a second silicon oxide film on the aluminum oxide film at a second temperature higher than the first temperature.

2. The method of manufacturing the thin-film transistor substrate according to claim 1 ,

wherein the first temperature is 230° C. or lower.

3. The method of manufacturing the thin-film transistor substrate according to claim 2 ,

wherein the second temperature is 290° C. or higher.

4. The method of manufacturing the thin-film transistor substrate according to claim 1 , further comprising

forming an opening through a stacked film composed of the first silicon oxide film, the aluminum oxide film, and the second silicon oxide film,

wherein the forming of the opening includes processing the aluminum oxide film by wet etching.

5. The method of manufacturing the thin-film transistor substrate according to claim 4 ,

wherein the forming of the opening further includes:

processing the second silicon oxide film by dry etching, before the processing of the aluminum oxide film; and

processing the first silicon oxide film by dry etching, after the processing of the aluminum oxide film.

6. The method of manufacturing the thin-film transistor substrate according to claim 1 , further comprising:

forming a gate electrode above the substrate;

forming a gate insulation film on the gate electrode;

forming the semiconductor layer on the gate insulation film; and

forming a source electrode and a drain electrode to connect to the semiconductor layer,

wherein the forming of the source electrode and the drain electrode includes the forming of the CuMn alloy film.

7. The method of manufacturing the thin-film transistor substrate according to claim 6 ,

wherein the forming of the source electrode and the drain electrode further includes:

forming a Mo film;

forming a Cu film on the Mo film; and

the forming of the CuMn alloy film on the Cu film.

8. The method of manufacturing the thin-film transistor substrate according to claim 6 ,

wherein the forming of the source electrode and the drain electrode further includes:

forming a first CuMn alloy film;

forming a Cu film on the first CuMn alloy film; and

the forming of the CuMn alloy film on the Cu film as a second CuMn alloy film.

9. The method of manufacturing the thin-film transistor substrate according to claim 1 ,

wherein the first silicon oxide film and the second silicon oxide film are deposited by plasma CVD.

10. The method of manufacturing the thin-film transistor substrate according to claim 1 ,

wherein the semiconductor layer is an oxide semiconductor layer.

11. The method of manufacturing the thin-film transistor substrate according to claim 10 ,

wherein the oxide semiconductor layer is a transparent amorphous oxide semiconductor.

12. The method of manufacturing the thin-film transistor substrate according to claim 1 ,

wherein the CuMn alloy film is a part of wiring.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2025
From: JDI DESIGN AND DEVELOPMENT G.K.
To: MAGNOLIA BLUE CORPORATION
Reel/Frame 072039/0656 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2024
From: JOLED, INC.
To: JDI DESIGN AND DEVELOPMENT G.K.
Reel/Frame 066382/0619 →
CORRECTION BY AFFIDAVIT FILED AGAINST REEL/FRAME 063396/0671 Recorded Jun 12, 2023
From: JOLED, INC.
To: JOLED, INC.
Reel/Frame 064067/0723 →
SECURITY INTEREST Recorded Apr 20, 2023
From: JOLED, INC.
To: INCJ, LTD.
Reel/Frame 063396/0671 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 28, 2016
From: SATOH, EIICHI
To: JOLED INC.
Reel/Frame 038114/0026 →