Static electricity protection circuit, electro-optical apparatus, and electronic equipment
A first static electricity protection circuit is provided with a first n-type transistor and a first p-type transistor, a second static electricity protection circuit is provided with at least one of a second n-type transistor and a second p-type transistor, a source is connected with a gate in these transistors, a gate of the first n-type transistor is electrically connected with a low potential power wiring VSS, a drain of the first n-type transistor is electrically connected with a signal wiring SL, a gate of the first p-type transistor is electrically connected with a high potential power wiring VDD, a drain of the first p-type transistor is electrically connected with the signal wiring SL, and a drain of at least one of the second n-type transistor and the second p-type transistor is electrically connected with the low potential power wiring VSS or the high potential power wiring VDD.
1. A static electricity protection circuit comprising:
a first static electricity protection circuit;
a second static electricity protection circuit;
a first power wiring;
a second power wiring; and
a signal wiring,
wherein
each of the first static electricity protection circuit and the second static electricity protection circuit is respectively electrically connected with the first power wiring, the second power wiring, and the signal wiring,
the first static electricity protection circuit is provided with a first transistor and a second transistor,
the second static electricity protection circuit is provided with a third transistor,
the first transistor is an n-type transistor,
the second transistor is a p-type transistor,
the third transistor is either an n-type or a p-type transistor,
one out of a source and a drain of each of the first transistor, the second transistor, and the third transistor is electrically connected with a gate,
the gate of the first transistor is electrically connected with the first power wiring,
the other out of the source and the drain of the first transistor is electrically connected with the signal wiring,
the gate of the second transistor is electrically connected with the second power wiring,
the other out of the source and the drain of the second transistor is electrically connected with the signal wiring, and
the other out of the source and the drain of the third transistor is electrically connected with the first power wiring or the second power wiring.
2. The static electricity protection circuit according to claim 1 ,
wherein
the second static electricity protection circuit is provided with a fourth transistor,
the third transistor is an n-type transistor,
the fourth transistor is a p-type transistor,
one out of a source and a drain of the fourth transistor is electrically connected with a gate,
the gate of the third transistor and the other out of the source and the drain of the fourth transistor are electrically connected with the first power wiring, and
the gate of the fourth transistor and the other out of the source and the drain of the third transistor are electrically connected with the second power wiring.
3. The static electricity protection circuit according to claim 1 ,
wherein the second static electricity protection circuit has a higher resistance than the first static electricity protection circuit.
4. The static electricity protection circuit according to claim 1 ,
wherein
the first transistor and the third transistor have substantially the same channel width,
the second transistor and the fourth transistor have substantially the same channel width,
a channel length of the third transistor is 120% of the channel length of the first transistor or is longer than 120%, and
the channel length of the fourth transistor is 120% of the channel length of the second transistor or is longer than 120%.
5. An electro-optical apparatus comprising
the static electricity protection circuit according to claim 1 .
6. An electronic equipment comprising
the static electricity protection circuit according to claim 1 .