IP Library Granted Patent US 9,620,632
Granted Patent B2
US 9,620,632 · App. 15/030,192 · Granted Apr 11, 2017

Semiconductor device and method of manufacturing the semiconductor device

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Quick Facts
Patent No.
US 9,620,632
App. No.
15/030,192
Granted
Apr 11, 2017
Kind
B2
Abstract

A semiconductor device includes: a semiconductor substrate, an upper electrode, a lower electrode and a gate electrode. In the semiconductor substrate, a body region, a pillar region, and a barrier region are formed. The pillar region has an n-type impurity, is formed on a lateral side of the body region, and extends along a depth from a top surface of the semiconductor substrate to a lower end of the body region. The barrier region has an n-type impurity and is formed on a lower side of the body region and the pillar region. The barrier region is formed on the lower side of the pillar region. An n-type impurity concentration distribution in a depth direction in the pillar region and the barrier region has a maximum value in the pillar region. The n-type impurity concentration distribution has a folding point on a side deeper than the maximum value.

Claims (23)

1. A semiconductor device comprising:

a semiconductor substrate;

an upper electrode formed on a top surface of the semiconductor substrate;

a lower electrode formed on a bottom surface of the semiconductor substrate; and

a gate electrode, wherein

an emitter region, a body region, a pillar region, a barrier region, a drift region, a collector region and a cathode region are formed in the semiconductor substrate,

the emitter region has an n-type impurity and is connected to the upper electrode,

the body region has a p-type impurity, is formed on a lateral side and on a lower side of the emitter region, and is connected to the upper electrode,

the pillar region has an n-type impurity, is formed on a lateral side of the body region, extends along a depth from the top surface of the semiconductor substrate to a lower end of the body region, is connected to the upper electrode, and is separated from the emitter region by the body region,

the barrier region has an n-type impurity, is formed on a lower side of the body region and the pillar region, and is separated from the emitter region by the body region,

the drift region has an n-type impurity, is formed on a lower side of the barrier region, is separated from the emitter region by the barrier region, and has an n-type impurity concentration lower than an n-type impurity concentration in the pillar region and the barrier region,

the collector region has a p-type impurity, is formed on a lower side of the drift region, is connected to the lower electrode, and is separated from the barrier region by the drift region,

the cathode region has an n-type impurity, is formed on the lower side of the drift region, is connected to the lower electrode, is separated from the barrier region by the drift region, and has an n-type impurity concentration higher than the n-type impurity concentration in the drift region,

a trench that penetrates through the emitter region, the body region and the barrier region and reaches the drift region is formed on the top surface of the semiconductor substrate,

an inner surface of the trench is covered with a gate insulating film,

the gate electrode is disposed in the trench,

an n-type impurity concentration distribution in a depth direction in the pillar region and the barrier region is arranged in a curved line which has a peak in the depth direction and has a maximum value in the pillar region, and

the n-type impurity concentration distribution has a folding point on a side deeper than the maximum value in the pillar region and shallower than a border of the barrier region and the drift region in the depth direction.

2. The semiconductor device according to claim 1 , wherein the n-type impurity concentration distribution has a maximum value in the barrier region.

3. The semiconductor device according to claim 1 , wherein

a p-type lower body region is formed between the barrier region and the drift region, and

the lower body region separates the barrier region and the drift region, is separated from the body region by the barrier region, and is separated from the collector region and the cathode region by the drift region.

4. The semiconductor device according to claim 1 , wherein an average value of a p-type impurity concentration in the pillar region is less than 1×10 15 atoms/cm 3 .

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 8, 2020
From: TOYOTA JIDOSHA KABUSHIKI KAISHA
To: DENSO CORPORATION
Reel/Frame 053727/0319 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 18, 2016
From: OKAWARA, JUN; YAMASHITA, YUSUKE; MACHIDA, SATORU
To: TOYOTA JIDOSHA KABUSHIKI KAISHA
Reel/Frame 038452/0826 →