IP Library Granted Patent US 10,482,813
Granted Patent B2
US 10,482,813 · App. 15/032,133 · Granted Nov 19, 2019

Power off method of display device, and display device

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Quick Facts
Patent No.
US 10,482,813
App. No.
15/032,133
Granted
Nov 19, 2019
Kind
B2
Abstract

A power off method of a display device includes: detecting a power off operation on the display device; setting, when the power off operation is detected, a same potential in one electrode and an other electrode of a capacitance element in each of a plurality of pixel circuits; and stopping power supply to a display panel immediately after the same potential is set.

Claims (45)

1. A power off method of a display device that includes a display panel having a plurality of pixel circuits arranged in a matrix, each of the plurality of pixel circuits including: a light emitting element that emits light according to an amount of current supplied; a drive transistor that supplies the current to the light emitting element; and a capacitance element that is connected to a gate of the drive transistor and holds a voltage representing luminance, the power off method of a display device comprising:

detecting a power off operation on the display device;

setting, when the power off operation is detected, a same potential in a first electrode and a second electrode of the capacitance element in each of the plurality of pixel circuits; and

stopping power supply to the display panel after the same potential is set,

wherein each of the plurality of pixel circuits further includes:

a first switch transistor connected to the first electrode of the capacitance element;

a first wire connected to the first electrode of the capacitance element via the first switch transistor;

a second switch transistor connected to the second electrode of the capacitance element and not connected to the first electrode of the capacitance element, the second switch transistor being separate from the drive transistor;

a second wire connected to the second electrode of the capacitance element via the second switch transistor;

a third switch transistor connected to the first electrode of the capacitance element; and

a node to which only the following four elements are connected: the first electrode of the capacitance element, a gate of the drive transistor, a drain/source of the first switch transistor, and a drain/source of the third switch transistor, and

the setting comprises:

turning off, when the power off operation is detected, the first switch transistor and the second switch transistor before 0V is supplied to the first and the second wires;

supplying 0V to the first wire and the second wire;

determining whether a wait time has elapsed, the wait time being a time period from a start of supplying 0V to the first wire and the second wire to when the potentials of the first wire and the second wire are determined to be at 0V, wherein after 0V is supplied to the first and second wires, the potentials of the first wire and the second wire are gradually changed to approach 0V during the wait time; and

turning on the first switch transistor and the second switch transistor after the wait time is determined to be elapsed.

2. The power off method of a display device according to claim 1 ,

wherein in the setting, a ground potential is set in the plurality of pixel circuits as the same potential.

3. The power off method of a display device according to claim 1 ,

wherein in the setting, the same potential is set in the plurality of pixel circuits simultaneously.

4. The power off method of a display device according to claim 1 , further comprising a second node to which only the following four elements are connected: the second electrode of the capacitance element, a drain/source of the drive transistor, a drain/source of the second switch transistor, and an anode of the light emitting element.

5. A display device comprising:

a display panel having a plurality of pixel circuits arranged in a matrix, each of the plurality of pixel circuits including: a light emitting element that emits light according to an amount of current supplied; a drive transistor that supplies the current to the light emitting element; and a capacitance element that is connected to a gate of the drive transistor and holds a voltage representing luminance;

a controller configured to set, when a power off operation is detected, a same potential in a first electrode and a second electrode of the capacitance element in each of the plurality of pixel circuits; and

a power source configured to stop power supply to the display panel after a specific process to set the same potential is completed,

wherein each of the plurality of pixel circuits further includes:

a first switch transistor connected to the first electrode of the capacitance element;

a first wire connected to the first electrode of the capacitance element via the first switch transistor;

a second switch transistor connected to the second electrode of the capacitance element and not connected to the first electrode of the capacitance element, the second switch transistor being separate from the drive transistor;

a second wire connected to the second electrode of the capacitance element via the second switch transistor;

a third switch transistor connected to the first electrode of the capacitance element; and

a first node to which only the following four elements are connected: the first electrode of the capacitance element, a gate of the drive transistor, a drain/source of the first switch transistor, and a drain/source of the third switch transistor, and

the controller sets the same potential in first electrode and the second electrode of the capacitance element, by

turning off, when the power off operation is detected, the first switch transistor and the second switch transistor before 0V is supplied to the first and the second wires;

supplying 0V to the first wire and the second wire;

determining whether a wait time has elapsed, the wait time being a time period from a start of supplying 0V to the first wire and the second wire to when the potentials of the first wire and the second wire are determined to be at 0V, wherein after 0V is supplied to the first and second wires, the potentials of the first wire and the second wire are gradually changed to approach 0V during the wait time; and

turning on the first switch transistor and the second switch transistor after the wait time is determined to be elapsed.

6. The power off method of a display device according to claim 1 , wherein the second electrode of the capacitance element is connected to an anode of the light emitting element.

7. The power off method of a display device according to claim 1 , wherein the second switch transistor is connected between an anode of the light emitting element and either source or drain of the drive transistor.

8. The power off method of a display device according to claim 1 , wherein

one of a source and a drain of the first switch transistor is connected to the first electrode of the capacitance element;

an other one of the source and the drain of the first switch transistor is connected to the first wire;

one of a source and a drain of the second switch transistor is connected to the second electrode of the capacitance element; and

an other one of the source and the drain of the second switch transistor is connected to the second wire.

9. The display device according to claim 5 , further comprising a second node to which only the following four elements are connected: the second electrode of the capacitance element, a drain/source of the drive transistor, a drain/source of the second switch transistor, and an anode of the light emitting element.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2025
From: JDI DESIGN AND DEVELOPMENT G.K.
To: MAGNOLIA BLUE CORPORATION
Reel/Frame 072039/0656 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2024
From: JOLED, INC.
To: JDI DESIGN AND DEVELOPMENT G.K.
Reel/Frame 066382/0619 →
CORRECTION BY AFFIDAVIT FILED AGAINST REEL/FRAME 063396/0671 Recorded Jun 12, 2023
From: JOLED, INC.
To: JOLED, INC.
Reel/Frame 064067/0723 →
SECURITY INTEREST Recorded Apr 20, 2023
From: JOLED, INC.
To: INCJ, LTD.
Reel/Frame 063396/0671 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 26, 2016
From: TSUGE, HITOSHI
To: JOLED INC.
Reel/Frame 038384/0655 →