IP Library Granted Patent US 9,785,176
Granted Patent B2
US 9,785,176 · App. 15/043,154 · Granted Oct 10, 2017

Small-circuit-scale reference voltage generating circuit

Inventors: Mitsuya Fukazawa (Tokyo, JP); Kenji Furusawa (Tokyo, JP)
Assignee: Renesas Electronics Corporation
G05F3/16G05F3/20G05F3/30
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Quick Facts
Patent No.
US 9,785,176
App. No.
15/043,154
Granted
Oct 10, 2017
Kind
B2
Abstract

A reference voltage generating circuit including a bandgap reference circuit generating a bandgap reference voltage, and a filter circuit smoothing the bandgap reference voltage. The bandgap reference circuit is configured to generate the bandgap reference voltage having a first voltage value when a clock signal is in a first logic level, and to generate the bandgap reference voltage having a second voltage value when the clock signal is in a second logic level. The filter circuit includes a first capacitive element charged with the bandgap reference voltage having the first voltage value in the first clock cycle, a second capacitive element charged with the bandgap reference voltage having the second voltage value in the first clock cycle, a third capacitive element charged with the bandgap reference voltage, and a fourth capacitive element.

Claims (73)

1. A reference voltage generating circuit, comprising:

a bandgap reference circuit generating a bandgap reference voltage; and

a filter circuit smoothing the bandgap reference voltage,

wherein the bandgap reference circuit is configured to generate the bandgap reference voltage having a first voltage value when a clock signal is in a first logic level, and to generate the bandgap reference voltage having a second voltage value when the clock signal is in a second logic level,

wherein the filter circuit includes:

a first capacitive element charged with the bandgap reference voltage having the first voltage value in the first clock cycle;

a second capacitive element charged with the bandgap reference voltage having the second voltage value in the first clock cycle;

a third capacitive element charged with the bandgap reference voltage having the first voltage value in a second clock cycle immediately before or after the first clock cycle; and

a fourth capacitive element charged with the bandgap reference voltage having the second voltage value in the second clock cycle, and

in the second clock cycle, the filter circuit outputs the bandgap reference voltage having a magnitude corresponding to an average value of charging voltages of the first and second capacitive elements, and in the first clock cycle, the filter circuit outputs the bandgap reference voltage having a magnitude corresponding to an average value of charging voltages of the third and fourth capacitive elements.

2. The reference voltage generating circuit according to claim 1 , wherein the bandgap reference circuit comprises a chopper stabilized bandgap reference circuit.

3. The reference voltage generating circuit according to claim 1 , wherein

the filter circuit further includes:

first to fourth switches connected between an input terminal supplied with the bandgap reference voltage from the bandgap reference circuit and the first to fourth capacitive elements, respectively; and

fifth to eighth switches connected between an output terminal and the first and fourth capacitive element respectively.

4. The reference voltage generating circuit according to claim 3 , further comprises:

a control signal generating circuit generating a control signal for controlling ON/OFF of the first to eighth switches by using the clock signal.

5. The reference voltage generating circuit according to claim 3 , wherein

the bandgap reference circuit includes:

an operational amplifier receiving a first input voltage at one differential input terminal and receiving a second input voltage at the other differential input terminal; and

a switch circuit alternately switching between the differential input terminal receiving the first input voltage and the differential input terminal receiving the second input voltage, in synchronization with the clock signal, and

wherein the operational amplifier generates the bandgap reference voltage based on an output voltage of the operational amplifier.

6. The reference voltage generating circuit according to claim 1 , wherein

the filter circuit further comprises:

first to fourth switches connected between an input terminal supplied with the bandgap reference voltage from the bandgap reference circuit and the first to fourth capacitive elements, respectively.

7. The reference voltage generating circuit according to claim 1 , wherein:

the filter circuit further comprises:

fifth to eighth switches connected between an output terminal and the first and fourth capacitive element respectively.

8. The reference voltage generating circuit according to claim 1 , wherein

the bandgap reference circuit includes:

an operational amplifier receiving a first input voltage at one differential input terminal and receiving a second input voltage at the other differential input terminal.

9. The reference voltage generating circuit according to claim 8 , wherein the bandgap reference circuit includes:

a switch circuit alternately switching between the differential input terminal receiving the first input voltage and the differential input terminal receiving the second input voltage, in synchronization with the clock signal.

10. A reference voltage generating circuit, comprising:

a filter circuit smoothing a bandgap reference voltage,

wherein the filter circuit includes:

a first capacitive element charged with a bandgap reference voltage comprising the first voltage value in the first clock cycle, the bandgap reference voltage comprises the first voltage value when a clock signal is in a first logic level;

a second capacitive element charged with the bandgap reference voltage comprises a second voltage value in the first clock cycle, the bandgap reference voltage comprises the second voltage value when the clock signal is in a second logic level;

a third capacitive element charged with the bandgap reference voltage comprising the first voltage value in a second clock cycle immediately before or after the first clock cycle; and

a fourth capacitive element charged with the bandgap reference voltage comprising the second voltage value in the second clock cycle, and

in the second clock cycle, the filter circuit outputs the bandgap reference voltage having a magnitude corresponding to an average value of charging voltages of the first and second capacitive elements, and in the first clock cycle, the filter circuit outputs the bandgap reference voltage having a magnitude corresponding to an average value of charging voltages of the third and fourth capacitive elements.

11. The reference voltage generating circuit according to claim 10 , wherein:

the filter circuit further comprises:

a plurality of switches including a first to eighth switch,

wherein the first to fourth switches are connected between an input terminal supplied with the bandgap reference voltage from the bandgap reference circuit and the first to fourth capacitive elements, respectively, and

wherein the fifth to eighth switches are connected between an output terminal and the first and fourth capacitive element respectively.

12. The reference voltage generating circuit according to claim 11 , wherein the plurality of switches receive a control signal for controlling ON/OFF of the plurality of switches by using the clock signal.

13. The reference voltage generating circuit according to claim 10 , wherein:

the filter circuit further comprises:

a plurality of switches including first to fourth switches connected between an input terminal supplied with the bandgap reference voltage from the bandgap reference circuit and the first to fourth capacitive elements, respectively.

14. The reference voltage generating circuit according to claim 13 , wherein the plurality of switches receive a control signal for controlling ON/OFF of the plurality of switches by using the clock signal.

15. The reference voltage generating circuit according to claim 10 , wherein:

the filter circuit further comprises:

a plurality of switches including fifth to eighth switches connected between an output terminal and the first and fourth capacitive element respectively.

16. A method for reference voltage generation, comprising:

generating, by a bandgap reference circuit, a bandgap reference voltage; and

smoothing, by a filter circuit, the bandgap reference voltage,

wherein the bandgap reference circuit is configured to generate the bandgap reference voltage comprising a first voltage value when a clock signal is in a first logic level, and to generate the bandgap reference voltage comprising a second voltage value when the clock signal is in a second logic level,

wherein the filter circuit includes a plurality of capacitive elements comprising a first to fourth capacitive elements,

charging a first capacitive element with the bandgap reference voltage comprising the first voltage value in the first clock cycle;

charging a second capacitive element with the bandgap reference voltage having the second voltage value in the first clock cycle;

charging a third capacitive element with the bandgap reference voltage having the first voltage value in a second clock cycle immediately before or after the first clock cycle;

charging a fourth capacitive element with the bandgap reference voltage comprising the second voltage value in the second clock cycle; and

in the second clock cycle, outputting, by the filter circuit, the bandgap reference voltage comprising a magnitude corresponding to an average value of charging voltages of the first and second capacitive elements, and in the first clock cycle, the filter circuit outputs the bandgap reference voltage having a magnitude corresponding to an average value of charging voltages of the third and fourth capacitive elements.

17. The method according to claim 16 , wherein the bandgap reference circuit is chopper stabilized.

18. The method according to claim 16 , wherein the filter circuit further includes first to fourth switches connected between an input terminal supplied with the bandgap reference voltage from the bandgap reference circuit and the first to fourth capacitive elements, respectively, and fifth to eighth switches connected between an output terminal and the first and fourth capacitive element respectively,

wherein the method further comprises generating, by a control signal generating circuit, a control signal for controlling ON/OFF of the first to eighth switches by using the clock signal.

19. The method according to claim 16 , wherein the bandgap reference circuit includes an operational amplifier and a switch circuit,

wherein the method further comprises:

receiving, by the operational amplifier, a first input voltage at one differential input terminal and receiving a second input voltage at the other differential input terminal.

20. The method according to claim 19 , further comprising:

alternately switching, by the switch circuit, between the differential input terminal receiving the first input voltage and the differential input terminal receiving the second input voltage, in synchronization with the clock signal, and

wherein the operational amplifier generates the bandgap reference voltage based on an output voltage of the operational amplifier.

Assignments (1)
CHANGE OF ADDRESS Recorded Dec 18, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 045764/0902 →
Priority Claims (1)
JP 2012-249484 · Nov 13, 2012 · national
Continuity (2)
Continuation 14072633 · Nov 5, 2013
Related Publication 20160161971A1 · Jun 9, 2016