Semiconductor memory device

1. A semiconductor memory device comprising:

a substrate including a main surface and an end surface adjacent to the main surface;

a conductor layer including a first terminal mounted on the main surface and extended toward the end surface;

a first insulating layer mounted on the main surface and covering a part of the conductor layer, the first insulating layer including a first opening that exposes at least part of the first terminal;

an electronic component mounted on the substrate; and

a USB connector that includes the substrate, the conductor layer, the first insulating layer, and a front end portion in a first direction,

wherein the first opening includes a first edge separated from the first terminal in the first direction in which the first terminal is extended, and a second edge separated from the first terminal in a second direction perpendicular to the first direction, a distance between the second edge and the first terminal in the second direction being larger than a distance between the first edge and the first terminal in the first direction,

the first terminal includes a side edge that is extended in the first direction,

the second edge includes a third edge and a fourth edge that are separated from the first terminal in the second direction and face the side edge,

the third edge is closer to the end surface than the fourth edge is,

a distance between the third edge and the first terminal is smaller than a distance between the fourth edge and the first terminal,

a distance between the front end portion and an end of the third edge in a direction of being more distant from the front end portion in the first direction is smaller than 3.90 mm, and

the conductor layer includes a second terminal that is extended toward the end surface, a third terminal that is extended toward the end surface, and a wiring that is extended from the second terminal in a direction intersecting with the first direction and connects the second terminal and the electronic component to each other.

2. The semiconductor memory device according to claim 1 , wherein the semiconductor memory device is configured to be inserted into an external device in the first direction.

3. The semiconductor memory device according to claim 2 , wherein, in a thickness direction of the substrate, a distance between a surface of the first insulating layer and the main surface of the substrate is larger than a distance between a surface of the first terminal and the main surface of the substrate.

4. The semiconductor memory device according to claim 3 , wherein

the conductor layer includes a ground layer, and a first ground wiring extended from the first terminal in a direction intersecting with the first direction, and

the first ground wiring connects the first terminal and the ground layer to each other.

5. The semiconductor memory device according to claim 4 , wherein

the second edge includes a fifth edge that connects the third edge and the fourth edge to each other, and

the fifth edge becomes more separated from the first terminal in the first direction with an increase in a distance from the end surface.

6. The semiconductor memory device according to claim 5 , wherein the first ground wiring is extended across the third edge, when seen in a plan view.

7. The semiconductor memory device according to claim 6 , wherein

the conductor layer includes a second ground wiring that is extended from part of the first terminal covered with the first insulating layer, and

the second ground wiring connects the ground layer and the first terminal to each other.

8. The semiconductor memory device according to claim 7 , wherein

a distance between the front end portion and an end of the fourth edge in a direction of being more distant from the front end portion in the first direction is larger than 6.15 mm.

9. The semiconductor memory device according to claim 8 ,

wherein

the first ground wiring is thicker than the wiring.

10. The semiconductor memory device according to claim 9 , further comprising a fuse,

wherein the wiring includes a first wiring portion that electrically connects the second terminal and the fuse to each other, and a second wiring portion that electrically connects the fuse and the electronic component to each other.

11. The semiconductor memory device according to claim 7 , further comprising a second insulating layer that covers part of the conductor layer and includes a second opening that exposes the first terminal,

wherein a distance between an edge of the second insulating layer and the first terminal is smaller than a distance between the second edge and the first terminal, the edge forming the second opening.

12. The semiconductor memory device according to claim 7 , wherein at least part of a portion of the first ground wiring exposed by the first opening is plated.