IP Library Granted Patent US 10,445,161
Granted Patent B2
US 10,445,161 · App. 15/056,319 · Granted Oct 15, 2019

Correction for linear interpolation error

Inventors: Carl V. Mattoon (Austin, TX); Travis L. Mooney (Pullman, WA)
Assignee: Schweitzer Engineering Laboratories, Inc.
G06F11/00G01R19/2513
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Quick Facts
Patent No.
US 10,445,161
App. No.
15/056,319
Granted
Oct 15, 2019
Kind
B2
Abstract

The present disclosure pertains correcting linear interpolation errors. In one embodiment, a system comprises an input configured to receive the periodic signal at a first sampling rate and an output configured to provide an interpolated representation of the periodic signal at a second sampling rate. A linear interpolation subsystem may establish a ratio between the first sampling rate and the second sampling rate to determine a slip frequency. The linear interpolation subsystem creates an interpolated representation of the periodic signal based on the ratio. The interpolated representation of the periodic signal includes a deterministic error attributable to interpolation. A linear interpolation correction subsystem may correct the deterministic error attributable to the linear interpolation subsystem and create a corrected interpolated representation. An application interface subsystem may provide the corrected interpolated representation to an application.

Claims (43)

1. A system configured to correct a linear interpolation error in an interpolated representation of a periodic signal of electrical power delivered to a load, the system comprising:

a sensor configured to receive an analog representation of the periodic signal;

a signal conditioning subsystem configured to condition the analog representation of the periodic signal and to create a conditioned representation;

an analog to digital converter subsystem configured to receive the conditioned representation and to create a digital representation of the conditioned representation at a first sampling rate;

an output configured to provide an interpolated representation of the periodic signal at a second sampling rate, different from the first sampling rate;

a memory;

a processor operatively coupled to the memory, wherein the processor is configured to:

establish a ratio between the first sampling rate and the second sampling rate to determine a slip frequency with respect to the periodic signal;

create the interpolated representation of the periodic signal based on the ratio, the interpolated representation of the periodic signal comprising a deterministic error attributable to interpolation;

correct the deterministic error to create a corrected interpolated representation; and

provide the corrected interpolated representation to an application to allow assessment of the electrical power delivered to the load.

2. The system of claim 1 , wherein the slip frequency is inversely proportional to a calculation period of the application.

3. The system of claim 2 , wherein the slip frequency causes an interpolation point to vary with respect to successive cycles of the periodic signal.

4. The system of claim 3 , wherein the first sampling rate is proportional to the product of f max and a specified number of samples per cycle plus the slip frequency.

5. The system of claim 1 , wherein the processor is configured to determine that the ratio between the first sampling rate and the second sampling rate ensures slip for all values within a frequency range.

6. The system of claim 5 , wherein the processor is configured to adjust the ratio whenever the first sampling rate is evenly divisible by the second sampling rate.

7. The system of claim 1 , wherein at least one of the first sampling rate and the second sampling rate is variable.

8. The system of claim 1 , wherein the processor is configured to apply a digital filter to the interpolated representation to create the corrected interpolated representation.

9. The system of claim 1 , wherein the processor is configured to apply a filter to the interpolated representation of the periodic signal to create the corrected interpolated representation.

10. The system of claim 9 , wherein the processor is configured to adjust parameters of the filter based on the deterministic error in the interpolated representation.

11. A method for correcting a linear interpolation error, the method comprising:

receiving an analog representation of a periodic signal;

conditioning the analog representation of the periodic signal to create a conditioned representation;

creating, via an analog-to-digital converter, a digital representation at a first sampling rate;

providing an interpolated representation of the periodic signal at a second sampling rate, different from the first sampling rate;

establishing a ratio between the first sampling rate and the second sampling rate to create a slip frequency with respect to the periodic signal;

creating the interpolated representation of the periodic signal based on the ratio, the interpolated representation of the periodic signal comprising a deterministic error attributable to interpolation;

correcting the deterministic error attributable to create creating a corrected interpolated representation; and

providing the corrected interpolated representation to an application to allow assessment of the electrical power delivered to the load.

12. The method of claim 11 , wherein the minimum slip frequency is inversely proportional to a calculation period of the application.

13. The method of claim 11 , wherein the slip frequency causes an interpolation point to vary with respect to successive cycles of the periodic signal.

14. The method of claim 11 , further comprising applying a digital filter to the interpolated representation to create the corrected interpolated representation.

15. The method of claim 11 , wherein creating the corrected interpolated representation comprises applying a filter to the interpolated representation.

16. The method of claim 15 further comprising:

adjusting the parameters of the filter based on the deterministic error in the interpolated representation.

17. A non-transitory, computer-readable media, comprising instructions configured to be executed by one or more processors, wherein the instructions are configured to cause the one or more processors to:

receive, via a digital-to-analog converter, a digital representation of a periodic signal on an electric power delivery system at a first sampling rate;

provide an interpolated representation of the periodic signal at a second sampling rate, different from the first sampling rate;

establish a ratio between the first sampling rate and the second sampling rate to determine a slip frequency with respect to the periodic signal;

create an interpolated representation of the periodic signal based on the ratio, the interpolated representation of the periodic signal comprising a deterministic error attributable to interpolation;

apply a filter to the interpolated representation to correct the deterministic error to create a corrected interpolated representation; and

output the corrected interpolation representation to an application to allow assessment of the electrical power delivered to a load of the electric power delivery system.

18. The non-transitory, computer-readable media of claim 17 , wherein the instructions are configured to cause the one or more processors to select a second sampling rate that is not evenly divisible by the first sampling rate.

Assignments (2)
NOTICE OF GRANT OF SECURITY INTEREST IN PATENTS Recorded Jun 4, 2018
From: SCHWEITZER ENGINEERING LABORATORIES, INC.
To: CITIBANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 047231/0253 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 29, 2016
From: MATTOON, CARL V.; MOONEY, TRAVIS L.
To: SCHWEITZER ENGINEERING LABORATORIES, INC.
Reel/Frame 037853/0518 →
Continuity (1)
Related Publication 20170248635A1 · Aug 31, 2017