IP Library Granted Patent US 9,778,669
Granted Patent B2
US 9,778,669 · App. 15/059,206 · Granted Oct 3, 2017

Low-noise high efficiency bias generation circuits and method

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Quick Facts
Patent No.
US 9,778,669
App. No.
15/059,206
Granted
Oct 3, 2017
Kind
B2
Abstract

Embodiments of signal bias generators and regulators are described generally herein. Other embodiments may be described and claimed.

Claims (18)

1. An apparatus for generating a substantially steady state positive voltage signal (PVS) and a substantially steady state negative voltage signal (NVS) to a switching module (SM), the PVS and the NVS remaining substantially stable during a switching event of the SM, including:

a bias signal generation module (BSGM) for generating a substantially steady state reference voltage signal (RVS), the RVS having a voltage level nominally less than the PVS;

a positive signal generation module (PSGM) generating the PVS, the PSGM including a first capacitor, the PSGM employing the first capacitor to nominally generate a portion of the PVS based on the RVS; and

a negative signal generation module (NSGM) generating the NVS, the NSGM including a second capacitor, the NSGM employing the second capacitor to nominally generate a portion of the NVS based on the RVS.

2. The apparatus of claim 1 , wherein the SM modulates a radio frequency (RF) signal.

3. The apparatus of claim 1 , the PSGM generating a positive capacitor control signal (PCCS) based at least partially on the RVS and employing the first capacitor to nominally generate a portion of the PVS at least partially based on the PCCS.

4. The apparatus of claim 1 , the NSGM generating a negative capacitor control signal (NCCS) based at least partially on the RVS and employing the second capacitor to nominally generate a portion of the NVS at least partially based on the NCCS.

5. The apparatus of claim 1 , the BSGM employing a first FET element and a second FET element formed on a common silicon on insulator (SOI) wafer in part to generate the RVS where the RVS is temperature independent.

6. The apparatus of claim 3 , wherein the ratio of the PVS voltage magnitude to the RVS voltage magnitude is about 1.5 to 4.

7. A method of generating a substantially steady state positive voltage signal (PVS) and a substantially steady state negative voltage signal (NVS) to a switching module (SM), the PVS and the NVS remaining substantially stable during a switching event of the SM, including:

generating a substantially steady state reference voltage signal (RVS), the RVS having a voltage level nominally less than the PVS;

employing a first capacitor to nominally generate a portion of the PVS based on the RVS; and

employing a second capacitor to nominally generate a portion of the NVS based on the RVS.

8. The method of claim 7 , wherein the SM modulates a radio frequency (RF) signal.

9. The method of claim 7 , further including generating a positive capacitor control signal (PCCS) based at least partially on the RVS and employing the first capacitor to nominally generate a portion of the PVS at least partially based on the PCCS.

10. The method of claim 9 , further including generating a negative capacitor control signal (NCCS) based at least partially on the RVS and employing the second capacitor to nominally generate a portion of the NVS at least partially based on the NCCS.

11. The method of claim 9 , wherein the ratio of the PVS voltage magnitude to the RVS voltage magnitude is about 1.5 to 4.

12. The method of claim 11 , wherein the ratio of the NVS voltage magnitude to the RVS voltage magnitude is about 1.5 to 4.

Assignments (3)
CHANGE OF NAME Recorded Mar 7, 2024
From: PEREGRINE SEMICONDUCTOR CORPORATION
To: PSEMI CORPORATION
Reel/Frame 066761/0459 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 5, 2024
From: KIM, TAE YOUN; ENGLEKIRK, ROBERT MARK
To: PEREGRINE SEMICONDUCTOR CORPORATION
Reel/Frame 066657/0023 →
CHANGE OF NAME Recorded Jan 24, 2018
From: PEREGRINE SEMICONDUCTOR CORPORATION
To: PSEMI CORPORATION
Reel/Frame 045749/0391 →