Self-refresh control device
View Patent ↗A self-refresh control device may be provided. The self-refresh control device may include a refresh signal output circuit configured to generate self-refresh signals with an oscillator and provide a refresh signal. The self-refresh control device may begin a self-refresh mode in response to a clock enable signal and a self-refresh signal within a self-refresh entry period, and may prevent performance of a new self-refresh operation by delaying an additional self-refresh signal until after the self-refresh entry period has ended.
1. A self-refresh control device comprising:
an enable signal generation circuit configured to latch a clock enable signal for a predetermined time to output an oscillation enable signal;
an end signal generation circuit configured to select any one of the oscillation enable signal and a self-refresh command signal to output the selected signal as an oscillation end signal; and
a refresh signal output circuit configured to generate a self-refresh signal in response to the oscillation end signal, and output a refresh signal by combining the oscillation end signal and the self-refresh signal.
2. The self-refresh control device according to claim 1 , wherein the enable signal generation circuit is configured to deactivate the oscillation enable signal when the self-refresh signal is activated.
3. The self-refresh control device according to claim 1 , wherein the enable signal generation circuit includes:
a pulse generator configured to generate a pulse signal by delaying the clock enable signal; and
a latch circuit configured to output the oscillation enable signal by latching the pulse signal.
4. The self-refresh control device according to claim 3 , wherein the pulse generator includes:
a plurality of inverters configured to delay the clock enable signal; and
a first NAND gate configured to perform a NAND operation between the clock enable signal and output signal of the plurality of inverters.
5. The self-refresh control device according to claim 3 , wherein the latch circuit is configured to deactivate the oscillation enable signal when the self-refresh signal is activated.
6. The self-refresh control device according to claim 3 , wherein the latch circuit includes a Set-Reset (SR) latch circuit, wherein the SR latch circuit receives an output signal of the pulse generator as a set signal, and receives the self-refresh signal as a reset signal.
7. The self-refresh control device according to claim 1 , wherein the end signal generation circuit is configured to activate the oscillation end signal when at least one of the oscillation enable signal and a delay signal of the self-refresh command signal is activated.
8. The self-refresh control device according to claim 1 , wherein the end signal generation circuit includes:
a first delay circuit configured to delay the self-refresh command signal for a predetermined time; and
a first combination circuit configured to perform an OR operation between an output signal of the first delay circuit and the oscillation enable signal to output the oscillation end signal.
9. The self-refresh control device according to claim 8 , wherein the first combination circuit includes:
a logic gate configured to perform a NOR operation between an output signal of the first delay circuit and the oscillation enable signal; and
a first inverter configured to output the oscillation end signal by inverting an output signal of the logic gate.
10. The self-refresh control device according to claim 1 , wherein the refresh signal output circuit includes:
an oscillator configured to generate the self-refresh signal in response to the oscillation end signal;
a second delay circuit configured to output a delay signal by delaying the self-refresh signal; and
a second combination circuit configured to output the refresh signal by combining the delay signal and the oscillation end signal.
11. The self-refresh control device according to claim 10 , wherein the second combination circuit is configured to output the refresh signal having a predetermined pulse width by performing an AND operation between the delay signal and the oscillation end signal.
12. The self-refresh control device according to claim 10 , wherein the oscillator maintains an operation state during an enable section of the oscillation end signal within a predetermined self-refresh mode section, such that the first self-refresh command signal is generated as a single pulse shape.
13. The self-refresh control device according to claim 10 , wherein the oscillator is configured to generate the self-refresh signal in response to a test signal that remains high in level during a specific period in a test mode.
14. The self-refresh control device according to claim 13 , wherein:
the test signal having a first period is input at a high temperature; and
the test signal having a second period is input at a low temperature,
wherein the first period is shorter than the second period.
15. The self-refresh control device according to claim 1 , wherein the self-refresh signal output circuit is configured to generate the refresh signal only once even when entering a plurality of self-refresh modes within a predetermined self-refresh mode section.
16. The self-refresh control device according to claim 1 , wherein the refresh signal is generated only once within a predetermined time section in which the oscillation enable signal and the oscillation end signal are activated to a high level.
17. A self-refresh control device comprising:
a refresh signal output circuit configured to generate self-refresh signals with an oscillator and provide a refresh signal,
wherein the self-refresh control device begins a self-refresh mode in response to a clock enable signal and a self-refresh signal within a self-refresh entry period, and prevents performance of a new self-refresh operation by delaying an additional self-refresh signal until after the self-refresh entry period has ended.
18. The self-refresh control device according to claim 17 , further comprising:
an enable signal generation circuit configured to latch the clock enable signal for a predetermined time to output an oscillation enable signal; and
an end signal generation circuit configured to select any one of the oscillation enable signal and a self-refresh command signal to output the selected signal as an oscillation end signal,
wherein the refresh signal output circuit generates the self-refresh signal in response to the oscillation end signal, and outputs the refresh signal by combining the oscillation end signal and the self-refresh signal.
19. A self-refresh control device comprising:
a refresh signal output circuit configured to generate self-refresh signals with an oscillator and provide a refresh signal,
wherein the self-refresh control device begins a self-refresh mode in response to a clock enable signal and a self-refresh signal within a self-refresh entry period, and only activates the refresh signal once during the self-refresh entry period,
wherein the refresh signal is activated only once during the self-refresh entry period by delaying an additional self-refresh signal until after the self-refresh entry period has ended.
20. The self-refresh control device according to claim 19 , further comprising:
an enable signal generation circuit configured to latch the clock enable signal for a predetermined time to output an oscillation enable signal; and
an end signal generation circuit configured to select any one of the oscillation enable signal and a self-refresh command signal to output the selected signal as an oscillation end signal,
wherein the refresh signal output circuit generates the self-refresh signal in response to the oscillation end signal, and outputs the refresh signal by combining the oscillation end signal and the self-refresh signal.