Semiconductor device and manufacturing method thereof

1. A semiconductor device comprising:

a first semiconductor substrate;

a second semiconductor substrate facing the first semiconductor substrate;

a first pad electrode disposed on a surface of the first semiconductor substrate facing the second semiconductor substrate;

a second pad electrode disposed on a surface of the second semiconductor substrate facing the first semiconductor substrate;

a first insulating layer disposed on an edge portion of the first semiconductor substrate and the first pad electrode;

a second insulating layer disposed on an edge portion the second semiconductor substrate and the second pad electrode;

a base metal layer disposed on the second insulating layer and a center portion of the second pad electrode, the base metal layer having a stepped first surface and a planar second surface opposite the stepped first surface;

a first metal layer disposed over the first semiconductor substrate and facing the second semiconductor substrate;

a second metal layer disposed on the base metal layer and facing the first metal layer, the second metal layer having a planar first surface in contact with the base metal layer, and a planar second surface opposite the planar first surface;

a third metal layer disposed between the first metal layer and the second metal layer;

a first alloy layer disposed between the first metal layer and the third metal layer comprising a component of the first metal layer and a component of the third metal layer; and

a second alloy layer disposed between the second metal layer and the third metal layer, comprising a component of the second metal layer and a component of the third metal layer,

wherein the first metal layer includes a stepped surface adjacent to and in contact with the first alloy layer, the stepped surface of the first metal layer including edge portions that extend beyond a central portion thereof.

2. The device according to claim 1 , wherein the third metal layer comprises solder.

3. The device according to claim 1 ,

wherein at least one of the first and second metal layers comprises Ni.

4. The device according to claim 1 ,

wherein at least one of the first and second metal layers comprises Au.

5. The device according to claim 1 , further comprising:

a third semiconductor substrate facing the first semiconductor substrate or the second semiconductor substrate.

6. A semiconductor device comprising a first substrate overlying, and physically and electrically connected to a second substrate, comprising:

a first metal layer on the first substrate;

a second metal layer on the second substrate, and an interconnection portion physically and electrically connecting the first metal layer and second metal layer, the interconnection portion comprising:

at least one third metal layer, and

an alloy of at least one of the first or the second metal layer and the third metal layer, wherein

the first metal layer includes a recessed portion extending inwardly therein, and the thickness of the third metal layer is greater in the space between the recessed portion and the second metal layer than in the space between a non-recessed portion of the first metal layer and the second metal layer.

7. The semiconductor device of claim 6 , wherein the first and second metal layers comprise Ni.

8. The semiconductor device of claim 6 , wherein at least one of the first and second metal layers comprise Au.

9. The semiconductor device of claim 6 , wherein the recessed portion is no deeper than 3.5 μm.

10. The semiconductor device of claim 6 , wherein at least one of the first and second metal layers comprise a through-silicon via.

11. A method of forming a semiconductor device, comprising:

positioning a first semiconductor substrate, the first semiconductor substrate comprising:

a first pad electrode disposed on a surface of the first semiconductor substrate facing a second semiconductor substrate;

a first insulating layer disposed on an edge portion of the first semiconductor substrate and the first pad electrode;

a first metal layer disposed over the first semiconductor substrate and facing the second semiconductor substrate, the first metal layer including a stepped surface having edge portions that extend beyond a central portion thereof; and

a solder layer disposed on the stepped surface of the first metal layer;

positioning the second semiconductor substrate adjacent to and facing the first semiconductor substrate, the second semiconductor substrate comprising:

a second pad electrode disposed on a surface of the second semiconductor substrate facing the first semiconductor substrate;

a second insulating layer disposed on an edge portion the second semiconductor substrate and the second pad electrode;

a base metal layer disposed on the second insulating layer and a center portion of the second pad electrode, the base metal layer having a stepped first surface and a planar second surface opposite the stepped first surface;

a second metal layer disposed on the base metal layer and facing the first metal layer, the second metal layer having a planar first surface in contact with the base metal layer, and a planar second surface opposite the planar first surface; and

a bonding metal layer disposed on the second metal layer; and

bonding the first semiconductor substrate to the second semiconductor substrate, the bonding comprising:

forming a first alloy layer between the first metal layer and the solder layer; and

forming a second alloy layer between the bonding metal layer and the solder layer, wherein at least a portion of the solder layer remains between the first alloy layer and the second alloy layer after bonding.

12. The method of claim 11 , wherein the solder layer comprises a tin (Sn) based solder.

13. The method of claim 11 , wherein the depth of the stepped surface in the first metal layer is less than or equal to 3.5 μm.