IP Library Granted Patent US 9,804,795
Granted Patent B2
US 9,804,795 · App. 15/061,216 · Granted Oct 31, 2017

Memory system and controller

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Quick Facts
Patent No.
US 9,804,795
App. No.
15/061,216
Granted
Oct 31, 2017
Kind
B2
Abstract

A memory including non-volatile memory. The memory system also includes a controller that controls data transfer between a host and the non-volatile memory, and a power supply unit that supplies a voltage to the controller. Further, the controller includes a power supply control unit that determines the voltage supplied to a module in the controller on the basis of an operation condition determined with the host. The power supply unit adjusts the voltage supplied to the module in accordance with a command from the power supply control unit.

Claims (39)

1. A memory system comprising:

a non-volatile memory that stores user data received from a host;

a controller that controls data transfer between the host and the non-volatile memory; and

a power supply that supplies a voltage to the controller,

wherein the controller includes:

a power supply control unit that determines the voltage supplied to a module in the controller on the basis of an operation condition determined with the host, the operation condition being a PCIe interface speed that is determined with the host, and

a PCIe controller that performs data communication with the host using a communication interface based on PCIe specification,

wherein the power supply unit adjusts the voltage supplied to the module in accordance with a command from the power supply control unit.

2. The memory system according to claim 1 , wherein

the power supply control unit supplies a first voltage to the module after power on, and

after a link up is completed, the power supply control unit supplies a second voltage, that is less than the first voltage, to the module.

3. The memory system according to claim 1 , wherein the operation condition is a connection condition determined during link up with the host.

4. The memory system according to claim 3 , wherein the connection condition is an interface speed of a data communication.

5. The memory system according to claim 3 , wherein the connection condition is the number of lanes used for the data communication.

6. The memory system according to claim 1 , wherein the power supply control unit determines the voltage in units of domains that are set in the controller.

7. A memory system comprising:

a non-volatile memory that stores user data received from a host; and

a controller that controls data transfer between the host and the non-volatile memory,

wherein the controller includes:

a clock management unit that supplies an operation clock to a module in the controller, and

a PCIe controller for performing data communication with the host using a communication interface based on PCIe specification,

wherein the clock management unit adjusts a clock frequency supplied to the module in the controller on the basis of an operation condition determined with the host, the operation condition being a PCIe interface speed that is determined with the host.

8. The memory system according to claim 7 , wherein

the clock management unit supplies a first clock frequency to the module after power on, and

after a link up is completed, the clock management unit supplies a second clock frequency, that is less than the first clock frequency, to the module.

9. The memory system according to claim 7 , wherein the operation condition is a connection condition determined during link up with the host.

10. The memory system according to claim 9 , wherein the connection condition is an interface speed of a data communication.

11. The memory system according to claim 9 , wherein the connection condition is the number of lanes used for the data communication.

12. The memory system according to claim 7 , wherein the clock management unit determines the clock frequency in units of domains that are set in the controller.

13. A controller comprising:

a memory interface that performs data transfer with a non-volatile memory storing user data from a host;

a host interface that performs data transfer with the host;

a power supply control unit that determines a voltage supplied to a module in the controller on the basis of an operation condition determined with the host and commands a power supply to supply the determined voltage; and

a clock management unit that adjusts a clock frequency sent to the module in the controller on the basis of the operation condition determined with the host.

14. The controller according to claim 13 , wherein the power supply control unit supplies a first voltage to the module after power on, and

after a link up is completed, the power supply control unit supplies a second voltage, that is less than the first voltage, to the module.

15. The controller according to claim 13 , wherein

the clock management unit supplies a first clock frequency to the module after power on, and

after a link up is completed, the clock management unit supplies a second clock frequency, that is less than the first clock frequency, to the module.

Assignments (5)
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 5, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043088/0620 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 29, 2016
From: CHIN, YOON TZE; YOSHIDA, NORIKAZU; ANAZAWA, MITSURU
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 038121/0804 →