IP Library Granted Patent US 9,971,725
Granted Patent B2
US 9,971,725 · App. 15/061,810 · Granted May 15, 2018

Semiconductor device that employs SATA power supply terminals for data transmission

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,971,725
App. No.
15/061,810
Granted
May 15, 2018
Kind
B2
Abstract

A semiconductor device includes a substrate having a serial advanced technology attachment (SATA) connector that has a plurality of power supply terminals and a plurality of signal terminals, a nonvolatile semiconductor memory unit disposed on the substrate, and a memory control circuit disposed on the substrate, configured to control the nonvolatile semiconductor memory unit, and having a data input terminal connected to a first power supply terminal of the SATA connector and a data output terminal connected to a second power supply terminal of the SATA connector. A serial signal of input data is transmitted from the first power supply terminal to the data input terminal, and a serial signal of output data is transmitted from the data output terminal to the second power supply terminal.

Claims (44)

1. A semiconductor device, comprising:

a substrate having a serial advanced technology attachment (SATA) connector that has a plurality of power supply terminals and a plurality of signal terminals;

a nonvolatile semiconductor memory unit disposed on the substrate; and

a memory control circuit disposed on the substrate, configured to control the nonvolatile semiconductor memory unit, and having a data input terminal connected to a first power supply terminal of the SATA connector and a data output terminal connected to a second power supply terminal of the SATA connector, wherein

a serial signal of input data is transmitted from the first power supply terminal to the data input terminal, and a serial signal of output data is transmitted from the data output terminal to the second power supply terminal, and

the memory control circuit also includes a signal terminal from which a data activity signal is output, and said signal terminal is also connected to the second power supply terminal.

2. The semiconductor device according to claim 1 , wherein

the plurality of signal terminals is connected to the memory control circuit, and

when communication between the signal terminals of the SATA connector and the memory control circuit is carried out in accordance with SATA protocol, the memory control circuit does not use the serial signal of input data.

3. The semiconductor device according to claim 2 , wherein

when the communication between the signal terminals of the SATA connector and the memory control circuit is carried out in accordance with the SATA protocol, a mode change signal is transmitted through the second power supply terminal of the SATA connector.

4. The semiconductor device according to claim 1 , wherein

when communication between the signal terminals of the SATA connector and the memory control circuit is carried out in accordance with SATA protocol, the data activity signal is transmitted from the signal terminal of the memory control circuit to the second power supply terminal.

5. The semiconductor device according to claim 1 , wherein

the plurality of power supply terminals includes a terminal for DC +12V, a terminal for DC +3.3V, and a terminal for DC +5V.

6. The semiconductor device according to claim 1 , further comprising:

a pullup circuit connected between the first power supply terminal and the data input terminal of the memory control circuit.

7. The semiconductor device according to claim 1 , wherein

the SATA connector is disposed along an edge of the substrate.

8. The semiconductor device according to claim 1 , wherein

the plurality of power supply terminals of the SATA connector consists of 15 power supply terminals, and

the plurality of signal terminals of the SATA connector consists of 7 signal terminals.

9. The semiconductor device according to claim 1 , wherein

part of the power supply terminals and part of the signal terminals are connected to ground.

10. The semiconductor device according to claim 1 , wherein

the input data include a program that is executed to perform a data access with respect to the nonvolatile semiconductor memory unit.

11. The semiconductor device according to claim 1 , wherein

the SATA connector includes no expansion terminal.

12. A method for transmitting data in a semiconductor device including a serial advanced technology attachment (SATA) connector that has a plurality of power supply terminals and a plurality of signal terminals, a nonvolatile semiconductor memory unit, and a memory control circuit, the method comprising:

transmitting a serial signal of input data from a first power supply terminal of the SATA connector to a data input terminal of the memory control circuit;

transmitting a serial signal of output data from a data output terminal of the memory control circuit to a second power supply terminal of the SATA connectors;

transmitting input data from at least one of the signal terminals to the memory control circuit in accordance with SATA protocol;

transmitting output data from the memory control circuit to another one of the signal terminals in accordance with the SATA protocol; and

when the transmission of the input data and the output data in accordance with the SATA protocol is carried out, transmitting a data activity signal from the memory control circuit to the second power supply terminal.

13. The method according to claim 12 , wherein

the serial signal of input data and the serial signal of output data are not in accordance with the SATA protocol.

14. The method according to claim 12 , wherein

when the transmission of the input data and the output data in accordance with the SATA protocol is carried out, the serial signal of input data is not transmitted.

15. The method according to claim 12 , further comprising:

when the transmission of the input data and the output data in accordance with the SATA protocol is carried out, transmitting a mode change signal through the second power supply terminal of the SATA connector to the memory control circuit.

16. The method according to claim 12 , wherein

the input data include a program that is executed to perform a data access with respect to the nonvolatile semiconductor memory unit.

17. The method according to claim 12 , wherein

the SATA connector includes no expansion terminal.

Assignments (5)
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043194/0647 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 13, 2016
From: KIMURA, NAOKI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 038585/0887 →