IP Library Patent Application 15061965
Patent Application
App. No. 15/061,965

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

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Quick Facts
Patent No.
US None
App. No.
15/061,965
Abstract

A semiconductor device includes a wiring substrate, a first semiconductor chip provided on the wiring substrate, a supporting member provided on the wiring substrate in a region which does not overlap with the first semiconductor chip in a plan view when viewed from a direction perpendicular to the wiring substrate, a resin member provided on the first semiconductor chip, and a second semiconductor chip provided on the supporting member and the resin member. A method for manufacturing a semiconductor device includes providing a first semiconductor chip in a first region on a wiring substrate, providing a supporting member in a second region on the wiring substrate, providing a resin member in at least a portion on the first semiconductor chip, and providing a second semiconductor chip on the supporting member and the resin member.

Claims (54)

1 . A semiconductor device comprising:

a wiring substrate;

a first semiconductor chip provided on the wiring substrate;

a supporting member provided on the wiring substrate in a region which does not overlap with the first semiconductor chip in a plan view when viewed from a direction perpendicular to the wiring substrate;

a resin member provided on the first semiconductor chip; and

a second semiconductor chip provided on the supporting member and the resin member.

2 . The device according to claim 1 , further comprising:

a circuit element provided on the wiring substrate.

3 . The device according to claim 2 , wherein

the first semiconductor chip and the circuit element are provided in regions, at least a part of which overlaps with the second semiconductor chip when the first semiconductor chip and the circuit element are projected onto a plane perpendicular to the wiring substrate.

4 . The device according to claim 1 , wherein

an area of the second semiconductor chip, when viewed from the first direction, is larger than an area of the first semiconductor chip, an area of the supporting member, and an area of the resin member.

5 . The device according to claim 1 , wherein

the resin member is provided in a region which overlaps with the first semiconductor chip when the resin member is projected onto a plane perpendicular to the wiring substrate.

6 . The device according to claim 5 , wherein

the resin member is substantially elliptic in shape.

7 . The device according to claim 6 , wherein

the resin member includes a plurality of resin members, each substantially elliptical in shape.

8 . The device according to claim 1 , wherein

the resin member comprises a thermoset resin having a viscosity of 50 to 1,000 Pa·s in an uncured state.

9 . The device according to claim 1 , wherein

the second semiconductor chip electrically connects to a metal wire via an electrode pad, and

the electrode pad is provided in a region which overlaps with the supporting member in a plan view when viewed from the direction perpendicular to the wiring substrate.

10 . The device according to claim 1 , wherein

the first semiconductor chip electrically connects to the wiring substrate by first metal wires,

the second semiconductor chip electrically connects to the wiring substrate by second metal wires, and

the number of the second metal wires is greater than the number of the first metal wires.

11 . The device according to claim 10 , wherein

the second semiconductor chip comprises a plurality of semiconductor chips including a memory element, and

the first semiconductor chip is a semiconductor chip including a controller of the memory element.

12 . A method for manufacturing a semiconductor device, comprising:

providing a first semiconductor chip in a first region on a wiring substrate;

providing a supporting member in a second region on the wiring substrate;

providing a resin member in at least a portion on the first semiconductor chip; and

providing a second semiconductor chip on the supporting member and the resin member.

13 . The method according to claim 12 , wherein

a circuit element is provided on the wiring substrate before the second semiconductor chip is provided on the wiring substrate.

14 . The method according to claim 13 , wherein

the circuit element is provided below the second semiconductor chip.

15 . The method according to claim 12 , wherein

the resin member is cured by heating after the second semiconductor chip is provided on the supporting member and the resin member.

16 . The method according to claim 12 , wherein

after the first semiconductor chip is provided in a first region on a wiring substrate, first metal wires electrically connecting the wiring substrate and the first semiconductor chip are formed,

after the second semiconductor chip is provided on the supporting member and the resin member, second metal wires electrically connecting the wiring substrate and the second semiconductor chip are formed, and

the number of the second metal wires is greater than the number of the first metal wires.

17 . A semiconductor device, comprising:

a wiring substrate having separate non-overlapping first, second and third regions;

a solid support member disposed on the wiring substrate in the first region;

a semiconductor chip of a first type mounted to the wiring substrate in the second region;

at least one circuit element mounted to the wiring substrate in the third region; and

a semiconductor chip of a second type mounted on the solid support member and extending over the semiconductor chip of the first type, wherein the semiconductor chip of the second type, when mounted on the solid support member, has a center of mass which is not located in the first region.

18 . The semiconductor device of claim 17 ; wherein a resin extends between the semiconductor chip of the first type and the semiconductor chip of the second type.

19 . The semiconductor device of claim 17 , further including a plurality of semiconductor chips of the second type connected together in stair-step relationship to one another, and wherein at least one of the semiconductor chips of the second type extends over the third region.

20 . The semiconductor device of claim 17 , wherein the semiconductor chip of the first type is a non-memory chip, and the semiconductor chip of the second type is a memory chip.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043194/0647 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 8, 2016
From: SHIMIZU, SHINYA; KIRITANI, MIKA; MURAMATSU, KEN
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 038840/0744 →