IP Library › Granted Patent US 9,882,258
Granted Patent B2
US 9,882,258 · App. 15/062,239 · Granted Jan 30, 2018

Multiple waveguides embedded around the periphery of a chip to provide simultaneous direct transitions between the chip and the multiple waveguides

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Quick Facts
Patent No.
US 9,882,258
App. No.
15/062,239
Filed
Mar 7, 2016
Granted
Jan 30, 2018
Kind
B2
Examiner
LEE, BENNY T
Art Unit
2842
USPC
333/26
Abstract

An apparatus providing a direct chip to waveguide transition, comprising: one or more waveguides, a chip partially embedding each of the waveguides at a transition area positioned at a narrow side of each waveguide, and a transmitting element disposed at each of the transition areas, thereby providing one or more simultaneous, direct transitions between the chip and the waveguides.

Claims (16)

1. An apparatus providing a direct chip to waveguide transition, comprising:

multiple waveguides;

a chip partially embedding two or more of said multiple waveguides along each of one or more edges of the chip, each of said multiple waveguides partially embedded by a respective transition area positioned at a narrow side of each waveguide where the narrow side runs perpendicular to the chip, and

a respective transmitting element disposed at an embedded portion of the corresponding transition area in each of the multiple waveguides, each transmitting element comprising a respective antenna, the antennas collectively providing multiple simultaneous, direct transitions between said chip and said multiple waveguides.

2. The apparatus of claim 1 , wherein a thinned periphery of said chip comprises at least a portion of each of said transition areas.

3. The apparatus of claim 2 , wherein a thickness of said thinned periphery of said chip is approximately 200 microns.

4. The apparatus of claim 2 , wherein each said antenna is a ring antenna that is disposed at said thinned periphery of said chip.

5. The apparatus of claim 2 , wherein said respective transmitting element comprises a corresponding tapered slot passage providing wideband signal transmission capability.

6. The apparatus of claim 5 , wherein a substrate layer is electrically connected to said thinned periphery of said chip, and galvanically connected to a respective one of said multiple waveguides of the corresponding transition areas.

7. The apparatus of claim 6 , wherein said respective tapered slot passage comprises a first portion disposed at said thinned periphery of said chip, and a second portion disposed at said substrate layer.

8. The apparatus of claim 7 , wherein a size of said chip is in an order of 6 mm ×6 mm.

9. The apparatus of claim 7 , wherein a combined size of said chip and said substrate layer is 16 mm ×16 mm.

10. The apparatus of claim 7 , wherein said chip is configured to operate at frequencies of approximately 100 GHz.

11. The apparatus of claim 1 , wherein said narrow side of each of said multiple waveguides is 0.8 mm.

12. The apparatus of claim 1 , further comprising a balun configured to balance a signal between each said transmitting element and a corresponding drive circuit of said chip.

13. The apparatus of claim 1 , further comprising a respective tuning element configured with said corresponding said transmitting element to adjust a frequency response of said respective transmitting element to suit a signal transmitted via a corresponding one of said multiple waveguides.