IP Library Granted Patent US 9,842,773
Granted Patent B2
US 9,842,773 · App. 15/063,187 · Granted Dec 12, 2017

Semiconductor device and method of manufacturing the same semiconductor device

Inventor: Kenro Nakamura (Kamakura Kanagawa, JP)
Assignee: TOSHIBA MEMORY CORPORATION
H01L21/76898H01L21/76831H01L23/481H01L21/76832
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Quick Facts
Patent No.
US 9,842,773
App. No.
15/063,187
Granted
Dec 12, 2017
Kind
B2
Abstract

The semiconductor device includes a semiconductor layer in which a via hole penetrating an upper surface of the semiconductor layer to a lower surface of the semiconductor layer is provided. The semiconductor device includes a first insulating film provided over the lower surface of the semiconductor layer and an inner surface of the via hole. The semiconductor device includes a second insulating film provided over the lower surface of the semiconductor layer and the inner surface of the via hole with the first insulating film interposed between the second insulating film and the semiconductor layer. The semiconductor device includes a device layer including a semiconductor element and provided on the side of the upper surface of the semiconductor layer.

Claims (19)

1. A semiconductor device, comprising: a semiconductor layer in which a via hole penetrating an upper surface of the semiconductor layer to a lower surface of the semiconductor layer is provided;

a first insulating film provided over the lower surface of the semiconductor layer and an inner surface of the via hole;

a second insulating film provided over the lower surface of the semiconductor layer and the inner surface of the via hole with the first insulating film interposed between the second insulating film and the semiconductor layer;

a device layer including a semiconductor element and provided on a side of the upper surface of the semiconductor layer;

a lower electrode that is provided in the via hole with the first and second insulating films interposed between the lower electrode and the inner surface of the via hole and is electrically connected to the device layer;

a protective insulating film that is provided on the upper surface of the semiconductor layer with the device layer interposed therebetween and protects the device layer; and

an upper electrode that is provided to be opposed to the lower electrode with the device layer interposed therebetween and is electrically connected to the device layer,

wherein the first insulating film has a greater thickness over the lower surface of the semiconductor layer than over the inner surface of the via hole in the semiconductor layer, wherein the second insulating film has a greater thickness over the lower surface of the semiconductor layer than over the inner surface of the via hole in the semiconductor layer, and

wherein a step coverage of the first insulating film and a step coverage of the second insulating film are not equal to each other.

2. The semiconductor device according to claim 1 , wherein one of the first insulating film and the second insulating film has a greater coefficient of linear expansion than the semiconductor layer, and another of the first insulating film and the second insulating film has a smaller coefficient of linear expansion than the semiconductor layer.

3. The semiconductor device according to claim 2 , wherein the first insulating film has a smaller coefficient of linear expansion than the semiconductor layer, and the second insulating film has a greater coefficient of linear expansion than the semiconductor layer.

4. The semiconductor device according to claim 2 , wherein the one of the first insulating film and the second insulating film that has a greater coefficient of linear expansion than the semiconductor layer is a Low-k film.

5. The semiconductor device according to claim 3 , wherein the second insulating film that has a greater coefficient of linear expansion than the semiconductor layer is a Low-k film.

6. The semiconductor device according to claim 1 , wherein the semiconductor layer is a silicon layer.

7. The semiconductor device according to claim 2 , wherein the semiconductor layer is a silicon layer.

8. The semiconductor device according to claim 3 , wherein the semiconductor layer is a silicon layer.

9. The semiconductor device according to claim 2 , wherein the one of the first insulating film and the second insulating film that has a greater coefficient of linear expansion than the semiconductor layer has a lower step coverage than the another of the first insulating film and the second insulating film.

10. The semiconductor device according to claim 7 , wherein the one of the first insulating film and the second insulating film that has a greater coefficient of linear expansion than the semiconductor layer has a lower step coverage than the another of the first insulating film and the second insulating film.

11. The semiconductor device according to claim 1 , wherein the first insulating film and the second insulating film extend integrally from a side wall of the via hole to the lower surface of the semiconductor layer.

Assignments (5)
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 28, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 042846/0146 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 7, 2016
From: NAKAMURA, KENRO
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 037913/0599 →
Priority Claims (1)
JP 2015-051406 · Mar 13, 2015 · national
Continuity (1)
Related Publication 20160268163A1 · Sep 15, 2016