Apparatus to store data and methods to read memory cells
View Patent ↗Apparatus to store data and methods to read memory cells are disclosed. A disclosed example method involves, during a read cycle of a memory cell, applying a current across the memory cell to read a content of the memory cell. During a subsequent read cycle of the memory cell, a subsequent current is applied across the memory cell in the opposite direction to read the content of the memory cell.
1. An apparatus to store data, comprising:
a memory cell; and
a circuit to:
during a read cycle of the memory cell having a dopant in a first distribution, read a content of the memory cell by applying a current across the memory cell to change the first distribution of the dopant to a second distribution, the first and second distributions of the dopant being representative of same stored information; and
during a subsequent read cycle of the memory cell, read the content of the memory cell by applying a subsequent current across the memory cell to change the second distribution of the dopant to the first distribution of the dopant.
2. The apparatus of claim 1 , wherein the first and second distributions of the dopant are to be above a threshold to represent the same stored information.
3. The apparatus of claim 1 , wherein the circuit is to, during a write cycle before the read cycle, apply a third current across the memory cell to produce the first distribution of the dopant in the memory cell.
4. The apparatus of claim 1 , wherein the memory cell is a memristive memory cell.
5. The apparatus of claim 1 , wherein the circuit is to apply the subsequent current in a direction opposite the current.
6. The apparatus of claim 1 , wherein the current and subsequent current are direct currents.
7. The apparatus of claim 1 , wherein the circuit is to perform at least one intervening read cycle of the memory cell between the read cycle and the subsequent read cycle.
8. The apparatus of claim 1 , wherein the circuit is to, prior to receiving a request for the subsequent read cycle, change an electrical current configuration to apply the subsequent current across the memory cell in the direction opposite the current.
9. The apparatus of claim 1 , wherein the circuit is collocated with the memory cell on a die.
10. A method comprising:
applying a read current to a memory cell during a read cycle, the read current changing a first distribution of a dopant in the memory cell to a second distribution of the dopant, the first and second distributions representing a same stored information; and
during a subsequent read cycle of the memory cell applying a subsequent current across the memory cell in a direction opposite the current, the subsequent current to render the first distribution of the dopant.
11. The method of claim 10 , wherein the first and second distributions of the dopant are to be above a threshold to represent the same stored information.
12. The method of claim 10 , further comprising, during a write cycle occurring before the read cycle, applying a third current across the memory cell to render the first distribution of the dopant in the memory cell.
13. The method of claim 10 , wherein the memory cell is a memristive memory cell.
14. The method of claim 10 , further comprising performing at least one intervening read cycle of the memory cell between the read cycle and the subsequent read cycle.
15. The method of claim 10 , further comprising, prior to receiving a request for the subsequent read cycle, changing an electrical current configuration to apply the subsequent current across the memory cell in the direction opposite the current.