Compound semiconductor device and manufacturing method of the same
View Patent ↗An embodiment of a compound semiconductor device includes: a substrate; a nitride compound semiconductor stacked structure formed on or above the substrate; and a gate electrode, a source electrode and a drain electrode formed on or above the compound semiconductor stacked structure. A recess positioning between the gate electrode and the drain electrode in a plan view is formed at a surface of the compound semiconductor stacked structure.
1. A compound semiconductor device, comprising:
a substrate;
a nitride compound semiconductor stacked structure formed on or above the substrate; and
a gate electrode, a source electrode and a drain electrode formed on or above the nitride compound semiconductor stacked structure,
wherein a recess disposed between the gate electrode and the drain electrode in a plan view is formed at a surface of the nitride compound semiconductor stacked structure,
wherein the nitride compound semiconductor stacked structure comprises:
a nitride electron transit layer;
a nitride electron supply layer formed on or above the nitride electron transit layer; and
a nitride surface layer formed on or above the nitride electron supply layer,
wherein the recess is formed at the nitride surface layer,
wherein
the nitride surface layer comprises:
a GaN lower layer;
an AlGaN intermediate layer formed on the GaN lower layer; and
a GaN upper layer formed on the AlGaN intermediate layer, and
a depth of the recess is smaller than a thickness of the nitride surface layer, and
wherein a depletion layer spreads around the recess within the nitride electron supply layer so as not to reach the nitride electron transit layer.
2. A compound semiconductor device, comprising:
a substrate;
a nitride compound semiconductor stacked structure formed on or above the substrate; and
a gate electrode, a source electrode and a drain electrode formed on or above the nitride compound semiconductor stacked structure,
wherein the nitride compound semiconductor stacked structure comprises:
a nitride electron transit layer;
a nitride electron supply layer formed on or above the nitride electron transit layer; and
a nitride surface layer formed on or above the nitride electron supply layer,
wherein the nitride surface layer comprises:
a GaN lower layer;
an AlGaN intermediate layer formed on the GaN lower layer; and
a GaN upper layer formed on the AlGaN intermediate layer,
wherein a recess disposed between the gate electrode and the drain electrode in a plan view is formed at a surface of the nitride surface layer,
wherein the recess further comprises: a plurality of steps, each respective step of the plurality of steps having a respective depth different from each other, wherein each respective step of the plurality of steps is connected to an adjacent respective step of the plurality of steps in a direction extending from the gate electrode to the drain electrode, and
wherein a depletion layer spreads around the recess within the nitride electron supply layer so as not to reach the nitride electron transit layer.
3. A compound semiconductor device, comprising:
a substrate;
a nitride compound semiconductor stacked structure formed on or above the substrate; and
a gate electrode, a source electrode and a drain electrode formed on or above the nitride compound semiconductor stacked structure,
wherein the nitride compound semiconductor stacked structure comprises:
a nitride electron transit layer;
a nitride electron supply layer formed on or above the nitride electron transit layer; and
a nitride surface layer formed on or above the nitride electron supply layer,
wherein the nitride surface layer comprises:
a GaN lower layer;
an AlGaN intermediate layer formed on the GaN lower layer; and
a GaN upper layer formed on the AlGaN intermediate layer,
wherein a recess disposed between the gate electrode and the drain electrode in a plan view is formed at a surface of the nitride surface layer,
wherein the recess is formed having a plurality of adjacent regions spaced apart from each other in a direction extending from the gate electrode to the drain electrode, and
wherein a depletion layer spreads around the recess within the nitride electron supply layer so as not to reach the nitride electron transit layer.
4. A compound semiconductor device, comprising:
a substrate;
a nitride compound semiconductor stacked structure formed on or above the substrate; and
a gate electrode, a source electrode and a drain electrode formed on or above the nitride compound semiconductor stacked structure,
wherein the nitride compound semiconductor stacked structure comprises:
a nitride electron transit layer;
a nitride electron supply layer formed on or above the nitride electron transit layer; and
a nitride surface layer formed on or above the nitride electron supply layer,
wherein the nitride surface layer comprises:
a GaN lower layer;
an AlGaN intermediate layer formed on the GaN lower layer; and
a GaN upper layer formed on the AlGaN intermediate layer,
wherein a recess disposed between the gate electrode and the drain electrode in a plan view is formed at a surface of the nitride surface layer,
further comprising a gate insulating film formed between the gate electrode and the nitride compound semiconductor stacked structure, and
wherein a depletion layer spreads around the recess within the nitride electron supply layer so as not to reach the nitride electron transit layer.
5. A compound semiconductor device, comprising:
a substrate;
a nitride compound semiconductor stacked structure formed on or above the substrate; and
a gate electrode, a source electrode and a drain electrode formed on or above the nitride compound semiconductor stacked structure,
wherein the nitride compound semiconductor stacked structure comprises:
a nitride electron transit layer;
a nitride electron supply layer formed on or above the nitride electron transit layer; and
a nitride surface layer formed on or above the nitride electron supply layer,
wherein the nitride surface layer comprises:
a GaN lower layer;
an AlGaN intermediate layer formed on the GaN lower layer; and
a GaN upper layer formed on the AlGaN intermediate layer,
wherein a recess disposed between the gate electrode and the drain electrode in a plan view is formed at a surface of the nitride surface layer,
wherein the recess divides a region between the gate electrode and the drain electrode into two portions in a plan view, and
wherein a depletion layer spreads around the recess within the nitride electron supply layer so as not to reach the nitride electron transit layer.
6. A power supply apparatus comprising:
a compound semiconductor device, which comprises:
a substrate;
a nitride compound semiconductor stacked structure formed on or above the substrate; and
a gate electrode, a source electrode and a drain electrode formed on or above the nitride compound semiconductor stacked structure,
wherein the nitride compound semiconductor stacked structure comprises:
a nitride electron transit layer;
a nitride electron supply layer formed on or above the nitride electron transit layer; and
a nitride surface layer formed on or above the nitride electron supply layer,
wherein the nitride surface layer comprises:
a GaN lower layer;
an AlGaN intermediate layer formed on the GaN lower layer; and
a GaN upper layer formed on the AlGaN intermediate layer,
wherein a recess disposed between the gate electrode and the drain electrode in a plan view is formed at a surface of the nitride surface layer, and
wherein a depletion layer spreads around the recess within the nitride electron supply layer so as not to reach the nitride electron transit layer.
7. An amplifier comprising:
a compound semiconductor device, which comprises:
a substrate;
a nitride compound semiconductor stacked structure formed on or above the substrate; and
a gate electrode, a source electrode and a drain electrode formed on or above the nitride compound semiconductor stacked structure,
wherein the nitride compound semiconductor stacked structure comprises:
a nitride electron transit layer;
a nitride electron supply layer formed on or above the nitride electron transit layer; and
a nitride surface layer formed on or above the nitride electron supply layer,
wherein the nitride surface layer comprises:
a GaN lower layer;
an AlGaN intermediate layer formed on the GaN lower layer; and
a GaN upper layer formed on the AlGaN intermediate layer,
wherein a recess disposed between the gate electrode and the drain electrode in a plan view is formed at a surface of the nitride surface layer, and
wherein a depletion layer spreads around the recess within the nitride electron supply layer so as not to reach the nitride electron transit layer.
8. A manufacturing method of a compound semiconductor device, comprising:
forming a nitride compound semiconductor stacked structure on or above a substrate;
forming a gate electrode, a source electrode and a drain electrode on or above the nitride compound semiconductor stacked structure; and
forming a recess disposed between the gate electrode and the drain electrode in a plan view at a surface of the nitride compound semiconductor stacked structure,
wherein the forming the nitride compound semiconductor stacked structure comprises:
forming a nitride electron transit layer;
forming a nitride electron supply layer on or above the nitride electron transit layer; and
forming a nitride surface layer on or above the nitride electron supply layer,
wherein the forming the nitride surface layer comprises:
forming a GaN lower layer;
forming an AlGaN intermediate layer on the GaN lower layer; and
forming a GaN upper layer on the AlGaN intermediate layer,
wherein the recess is formed at the nitride surface layer, and
wherein the forming the recess comprises etching a part of the nitride surface layer and making another part of the nitride surface layer remained in a depth direction, and
wherein a depletion layer spreads around the recess within the nitride electron supply layer so as not to reach the nitride electron transit layer.
9. A manufacturing method of a compound semiconductor device, comprising:
forming a nitride compound semiconductor stacked structure on or above a substrate;
forming a gate electrode, a source electrode and a drain electrode on or above the nitride compound semiconductor stacked structure; and
forming a recess disposed between the gate electrode and the drain electrode in a plan view at a surface of the nitride compound semiconductor stacked structure,
wherein the forming the nitride compound semiconductor stacked structure comprises:
forming a nitride electron transit layer;
forming a nitride electron supply layer on or above the nitride electron transit layer; and
forming a nitride surface layer on or above the nitride electron supply layer,
wherein the forming the nitride surface layer comprises:
forming a GaN lower layer;
forming an AlGaN intermediate layer on the GaN lower layer; and
forming a GaN upper layer on the AlGaN intermediate layer,
wherein the recess is formed at the nitride surface layer, and
wherein the recess further comprises: a plurality of steps, each respective step of the plurality of steps having a respective depth different from each other, wherein each respective step of the plurality of steps is connected to an adjacent respective step of the plurality of steps in a direction extending from the gate electrode to the drain electrode, and
wherein a depletion layer spreads around the recess within the nitride electron supply layer so as not to reach the nitride electron transit layer.
10. A manufacturing method of a compound semiconductor device, comprising:
forming a nitride compound semiconductor stacked structure on or above a substrate;
forming a gate electrode, a source electrode and a drain electrode on or above the nitride compound semiconductor stacked structure; and
forming a recess disposed between the gate electrode and the drain electrode in a plan view at a surface of the nitride compound semiconductor stacked structure,
wherein the forming the nitride compound semiconductor stacked structure comprises:
forming a nitride electron transit layer;
forming a nitride electron supply layer on or above the nitride electron transit layer; and
forming a nitride surface layer on or above the nitride electron supply layer,
wherein the forming the nitride surface layer comprises:
forming a GaN lower layer;
forming an AlGaN intermediate layer on the GaN lower layer; and
forming a GaN upper layer on the AlGaN intermediate layer,
wherein the recess is formed at the nitride surface layer, and
wherein the recess is formed having a plurality of adjacent regions spaced apart from each other in a direction extending from the gate electrode to the drain electrode, and
wherein a depletion layer spreads around the recess within the nitride electron supply layer so as not to reach the nitride electron transit layer.
11. A manufacturing method of a compound semiconductor device, comprising:
forming a nitride compound semiconductor stacked structure on or above a substrate;
forming a gate electrode, a source electrode and a drain electrode on or above the nitride compound semiconductor stacked structure; and
forming a recess disposed between the gate electrode and the drain electrode in a plan view at a surface of the nitride compound semiconductor stacked structure,
further comprising forming a gate recess at a surface of the nitride compound semiconductor stacked structure, wherein a part of the gate electrode is positioned in the gate recess,
wherein the forming the nitride compound semiconductor stacked structure comprises:
forming a nitride electron transit layer;
forming a nitride electron supply layer on or above the nitride electron transit layer; and
forming a nitride surface layer on or above the nitride electron supply layer, and
wherein the forming the nitride surface layer comprises:
forming a GaN lower layer;
forming an AlGaN intermediate layer on the GaN lower layer; and
forming a GaN upper layer on the AlGaN intermediate layer, and
wherein the recess is formed at the nitride surface layer, and
wherein a depletion layer spreads around the recess within the nitride electron supply layer so as not to reach the nitride electron transit layer.
12. A manufacturing method of a compound semiconductor device, comprising:
forming a nitride compound semiconductor stacked structure on or above a substrate;
forming a gate electrode, a source electrode and a drain electrode on or above the nitride compound semiconductor stacked structure; and
forming a recess disposed between the gate electrode and the drain electrode in a plan view at a surface of the nitride compound semiconductor stacked structure,
further comprising forming a gate insulating film disposed between the gate electrode and the nitride compound semiconductor stacked structure,
wherein the forming the nitride compound semiconductor stacked structure comprises:
forming a nitride electron transit layer;
forming a nitride electron supply layer on or above the nitride electron transit layer; and
forming a nitride surface layer on or above the nitride electron supply layer, and
wherein the forming the nitride surface layer comprises:
forming a GaN lower layer;
forming an AlGaN intermediate layer on the GaN lower layer; and
forming a GaN upper layer on the AlGaN intermediate layer, and
wherein the recess is formed at the nitride surface layer, and
wherein a depletion layer spreads around the recess within the nitride electron supply layer so as not to reach the nitride electron transit layer.
13. A manufacturing method of a compound semiconductor device, comprising:
forming a nitride compound semiconductor stacked structure on or above a substrate;
forming a gate electrode, a source electrode and a drain electrode on or above the nitride compound semiconductor stacked structure; and
forming a recess disposed between the gate electrode and the drain electrode in a plan view at a surface of the nitride compound semiconductor stacked structure,
wherein the forming the nitride compound semiconductor stacked structure comprises:
forming a nitride electron transit layer;
forming a nitride electron supply layer on or above the nitride electron transit layer; and
forming a nitride surface layer on or above the nitride electron supply layer,
wherein the forming the nitride surface layer comprises:
forming a GaN lower layer;
forming an AlGaN intermediate layer on the GaN lower layer; and
forming a GaN upper layer on the AlGaN intermediate layer,
wherein the recess is formed at the nitride surface layer, and
wherein the recess is formed to divide a region between the gate electrode and the drain electrode into two portions in a plan view, and
wherein a depletion layer spreads around the recess within the nitride electron supply layer so as not to reach the nitride electron transit layer.