IP Library Granted Patent US 9,990,150
Granted Patent B2
US 9,990,150 · App. 15/077,688 · Granted Jun 5, 2018

Method to provide transactional semantics for updates to data structures stored in a non-volatile memory

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Quick Facts
Patent No.
US 9,990,150
App. No.
15/077,688
Granted
Jun 5, 2018
Kind
B2
Abstract

In a computing system that includes NVRAM, when an application modifies a data structure stored in NVRAM via a transaction, an interface creates a transaction log for the requested change to the data structure. The transaction log tracks or stores the initial value of each field of the data structure in NVRAM to be updated as part of the transaction. After all updates of the data structure have been implemented in nonvolatile RAM and the transaction is complete, the transaction is committed and the transaction log is deleted. If at any point the transaction is interrupted, for example due to an unexpected power loss or process crash, the initial, consistent values for the data structure are used upon start-up of the computing system or reinitialization of the process.

Claims (42)

1. A method of atomically updating first and second old values of a data structure that is stored in a nonvolatile random access memory (NVRAM) with first and second new values, in response to storing a new key-value pair in a write buffer that is stored in the NVRAM, said method comprising the steps of:

recording in a transaction log that is stored in the NVRAM, the first old value that is updated by the first new value;

storing the first new value for updating the data structure in the NVRAM;

recording in the transaction log the second old value that is updated by the second new value;

storing the second new value for updating the data structure in the NVRAM; and

deleting the transaction log upon completion of the steps of storing the first and second new values in the NVRAM,

wherein the data structure is associated with key-value pairs, including the new key-value pair, that are stored in the write buffer.

2. The method of claim 1 , wherein the data structure includes metadata associated with the write buffer.

3. The method of claim 1 , wherein the data structure includes a first field and a second field.

4. The method of claim 3 , wherein the first new value and the first old value are values for the first field.

5. The method of claim 4 , wherein the second new value and the second old value are values for the second field.

6. The method of claim 1 , further comprising:

receiving a request to create the transaction log; and

responsive to the request, creating the transaction log in the NVRAM.

7. The method of claim 1 , wherein deleting the transaction log comprises receiving a request to commit a transaction associated with the first new value and the second new value.

8. The method of claim 1 , wherein storing the first new value in the NVRAM comprises overwriting the first old value with the first new value.

9. A method of recovering a data structure that is stored in a nonvolatile random access memory (NVRAM), the method comprising:

detecting that (a) a power loss event has occurred in which power is interrupted to a computing device that includes the NVRAM or (b) a process crash event has occurred in an application associated with the data structure;

responsive to the detecting, determining that a transaction log associated with the data structure is stored in the NVRAM;

reading a first old value and a second old value from the transaction log; and

updating the data structure with the first old value and the second old value,

wherein the data structure is associated with key-value pairs that are stored in a write buffer that is also stored in the NVRAM.

10. The method of claim 9 , wherein determining that the transaction log is stored in the NVRAM comprises checking a value of a flag associated with the transaction log.

11. The method of claim 9 , further comprising, after reading the first old value and the second old value, deleting the transaction log.

12. A computing device, comprising:

a nonvolatile random access memory configured to store key-value pairs and a data structure associated with the key-value pairs, wherein the key-value pairs are stored in a write buffer that is also stored in the NVRAM;

a memory that stores a transaction service algorithm; and

a processor that is coupled to the memory and the NVRAM and, when executing the transaction service algorithm, is configured to:

record in a transaction log in the NVRAM a first old value that is updated by the first new value;

store the first new value for updating the data structure in the NVRAM;

record in the transaction a second old value that is updated by the second new value;

store the second new value for updating the data structure in the NVRAM; and

delete the transaction log upon completion of the steps of storing the first and second new values in the NVRAM.

13. The computing device of claim 12 , wherein the NVRAM comprises a volatile random access memory device coupled to a power loss protection circuit that copies contents of the volatile random access memory device into a nonvolatile storage device upon power loss.

14. The computing device of claim 13 , wherein the nonvolatile storage device comprises a flash memory device.

15. The computing device of claim 12 , wherein the NVRAM comprises at least one of a NOR flash memory device, a ferroelectric random access memory device, a magnetoresistive random access memory device, or a phase-change random access memory device.

16. The computing device of claim 12 , wherein the data structure includes a first field and a second field.

17. The computing device of claim 16 , wherein the first new value and the first old value are values for the first field.

18. The computing device of claim 17 , wherein the second new value and the second old value are values for the second field.

19. The computing device of claim 12 , wherein the processor is further configured to:

receive a request to create the transaction log; and

responsive to the request, create the transaction log in the NVRAM.

Assignments (6)
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043194/0647 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 22, 2016
From: JOSHI, RATNADEEP
To: TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.
Reel/Frame 038073/0498 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 22, 2016
From: TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 038073/0501 →