Substrate interposer on a leadframe
In one general aspect, a device can include a leadframe including at least one of an external input terminal or an external output terminal, an interposer made of an insulating material, and a redistribution layer coupled to the interposer and made of a conductive material. The redistribution layer can include a plurality of traces. The device can also include a semiconductor die disposed between the redistribution layer and the leadframe.
1. A device, comprising:
a leadframe having a leadframe portion and a recessed leadframe portion, the recessed leadframe portion having a thickness less than a thickness of the leadframe portion;
an interposer made of an insulating material, the interposer having a first surface and a second surface opposite to the first surface;
a redistribution layer coupled to the second surface of the interposer and made of a conductive material, the redistribution layer including a plurality of traces;
a first semiconductor die disposed between the redistribution layer and the recessed leadframe portion, the first semiconductor die having a drain facing toward and in contact with the redistribution layer;
a second semiconductor die disposed between the redistribution layer and the leadframe portion;
a molding portion disposed between the recessed leadframe portion and the first semiconductor die; and
a conductive pillar having a first end coupled to the redistribution layer and a second end coupled to the leadframe portion, the second end of the conductive pillar being coplanar with a surface of the first semiconductor die that faces the recessed leadframe portion.
2. The device of claim 1 , wherein a thickness of the conductive pillar is a fraction of a millimeter.
3. The device of claim 1 ,
wherein a thickness of the conductive pillar is substantially equal to a thickness of the first semiconductor die.
4. The device of claim 1 , wherein the second semiconductor die has a drain facing toward and in contact with the leadframe portion.
5. The device of claim 1 , wherein the second semiconductor die has a drain facing toward and electrically coupled to the redistribution layer.
6. The device of claim 1 , wherein the first semiconductor die is an integrated circuit (IC) having a first side insulated from the recessed leadframe portion by the molding portion, and the second semiconductor die is a field effect transistor (FET) having a first side electrically coupled to the redistribution layer and a second side electrically coupled to the leadframe portion.
7. The device of claim 1 , wherein a thickness of the conductive pillar is less than 85 microns.
8. The device of claim 1 , further comprising:
a layer of molding coupled to the first surface of the interposer.
9. The device of claim 1 , wherein at least a portion of a surface of the leadframe, on a side of the device opposite the interposer, is an exposed pad connection configured to connect to an external device.
10. The device of claim 1 , wherein a difference between a height of the leadframe portion and a height of the recessed leadframe portion is a fraction of a millimeter.
11. The device of claim 1 , wherein the first semiconductor die is an integrated circuit (IC), and the second semiconductor die is a low-side field effect transistor (FET).
12. The device of claim 1 , wherein the conductive pillar has a thickness less than a distance between a surface of the recessed leadframe portion that faces the first semiconductor die and a surface of the redistribution layer that faces the first semiconductor die.
13. A device, comprising:
a leadframe having a leadframe portion and a recessed leadframe portion, the recessed leadframe portion having a thickness than a thickness of the leadframe portion;
an interposer made of an insulating material, the interposer having a first surface and a second surface opposite to the first surface;
a redistribution layer coupled to the second surface of the interposer and made of a conductive material;
a layer of molding coupled to the first surface of the interposer, the layer of molding having a thickness less than a thickness of the interposer;
a first semiconductor die disposed between the redistribution layer and the recessed leadframe portion;
a molding portion disposed between the recessed leadframe portion and the first semiconductor die;
a second semiconductor die disposed between the redistribution layer and the leadframe portion, the second semiconductor die having a drain facing toward and electrically coupled to the redistribution layer; and
a conductive pillar having a first end coupled to the redistribution layer and a second end coupled to the leadframe portion, the second end of the conductive pillar being coplanar with a surface of the first semiconductor die that faces the recessed leadframe portion.
14. The device of claim 13 ,
wherein the first semiconductor die has a drain facing toward and electrically coupled to the redistribution layer.
15. The device of claim 13 , wherein a thickness of the conductive pillar is a fraction of a millimeter.
16. The device of claim 13 , wherein a thickness of the conductive pillar is substantially equal to a thickness of the first semiconductor die.
17. The device of claim 13 , wherein a thickness of the conductive pillar is less than 85 microns.
18. The device of claim 13 , wherein a difference between a height of the leadframe portion and a height of the recessed leadframe portion is a fraction of a millimeter.
19. A quad flat no lead (QFN) device, comprising:
a leadframe having a leadframe portion and a recessed leadframe portion, the recessed leadframe portion having a thickness less than a thickness of the leadframe portion;
an interposer including an insulating material, the interposer having a first surface and a second surface opposite to the first surface;
a redistribution layer coupled to the second surface of the interposer, the redistribution layer including a conductive material, the redistribution layer including a plurality of traces;
a layer of molding coupled to the first surface of the interposer, the layer of molding having a thickness less than a thickness of the interposer;
an integrated circuit (IC) coupled to the redistribution layer, the IC being disposed between the redistribution layer and the recessed leadframe portion;
a molding portion disposed between the recessed leadframe portion and the IC;
a low-side field effect transistor (FET) coupled to the redistribution layer, the low-side FET being disposed between the redistribution layer and the leadframe portion, the low-side FET having a drain facing toward and electrically in contact with the leadframe portion;
a high-side FET coupled to the redistribution layer; and
a conductive pillar having a first end coupled to the redistribution layer and a second end coupled to the leadframe portion, the second end of the conductive pillar being coplanar with a surface of the IC that faces the recessed leadframe portion, the second end of the conductive pillar being coplanar with a surface of the low-side FET that faces the leadframe portion.
20. The QFN device of claim 19 , wherein a thickness of the conductive pillar is a fraction of a millimeter.
21. The QFN device of claim 19 , wherein a thickness of the conductive pillar is substantially equal to a thickness of the IC.
22. The QFN device of claim 19 , wherein a thickness of the conductive pillar is less than 85 microns.