IP Library Granted Patent US 9,933,952
Granted Patent B1
US 9,933,952 · App. 15/086,527 · Granted Apr 3, 2018

Balancing allocated cache pages among storage devices in a flash cache

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,933,952
App. No.
15/086,527
Granted
Apr 3, 2018
Kind
B1
Abstract

Described herein are techniques for use in balancing allocated cache pages among storage devices in a flash cache. The techniques comprise determining an expected number of allocated cache pages in connection with a non-volatile storage device that forms at least part of a flash cache. The techniques also comprise performing a comparison between the expected number of allocated cache pages and an actual number of allocated or free cache pages in connection with the non-volatile storage device. The techniques further comprise selecting, based on the comparison, a free cache page in connection with the non-volatile storage device to allocate as a cache page.

Claims (76)

1. A computer-implemented method, comprising:

determining an expected number of allocated cache pages in connection with a non-volatile storage device that forms at least part of a flash cache;

performing a comparison between the expected number of allocated cache pages and an actual number of allocated or free cache pages in connection with the non-volatile storage device; and

based on the comparison, selecting a free cache page in connection with the non-volatile storage device to allocate as a cache page, to balance the allocated or free cache pages among a plurality of non-volatile storage devices that form the flash cache, wherein the non-volatile storage device is one of the plurality of non-volatile storage devices that forms the flash cache; and wherein determining the expected number of allocated cache pages in connection with the non-volatile storage device comprises: forming a first value relating to available cache storage associated with the non-volatile storage device; forming a second value relating to available cache storage associated with the flash cache; forming a ratio of the first value to the second value to produce a third value; forming a fourth value relating to an actual number of allocated cache pages in connection with the flash cache; and forming a product of the third and fourth values to produce the expected number of allocated cache pages in connection with the non-volatile storage device.

2. The method as claimed in claim 1 , wherein the non-volatile storage device is one of the plurality of non-volatile storage devices that forms the flash cache; and

wherein the method further comprises:

receiving a write I/O relating to a cache page in connection with another non-volatile storage device of the plurality of non-volatile storage devices that forms the flash cache;

performing a second comparison between the expected number of allocated cache pages and an actual number of allocated or free cache pages in connection with the another non-volatile storage device;

based on the second comparison, writing data associated with the write I/O to the selected cache page in connection with the non-volatile storage device; and

sending a command to free the cache page in connection with the another non-volatile storage device.

3. The method as claimed in claim 1 , wherein the non-volatile storage device is one of the plurality of non-volatile storage devices that forms the flash cache; and

wherein the method further comprises:

receiving data that is one of promoted or demoted to the flash cache; and

storing the data in the selected cache page in connection with the non-volatile storage device of the plurality of non-volatile storage devices that forms the flash cache.

4. The method as claimed in claim 1 , wherein the non-volatile storage device is one of the plurality of non-volatile storage devices that forms the flash cache; and

wherein the method further comprises:

detecting an intention to remove one of the plurality of non-volatile storage devices from the flash cache; and

moving data associated with a cache page in connection with the one of the plurality of non-volatile storage devices to the selected cache page.

5. The method as claimed in claim 1 , wherein the actual number corresponds to the amount of allocated cache pages in connection with the non-volatile storage device; and

wherein performing the comparison, comprises:

determining if the expected number of allocated cache pages is greater or less than the actual number of allocated cache pages in connection with the non-volatile storage device; and

in response to determining the expected number is greater than the actual number, determining to select a free cache page in connection with the non-volatile storage device to allocate as a cache page.

6. The method as claimed in claim 1 , wherein the actual number corresponds to the amount of free cache pages in connection with the non-volatile storage device; and

wherein performing the comparison, comprises:

determining if the expected number of allocated cache pages is greater or less than the actual number of free cache pages in connection with the non-volatile storage device; and

in response to determining the expected number is less than the actual number, determining to select a free cache page in connection with the non-volatile storage device to allocate as a cache page.

7. An apparatus, comprising:

memory; and

processing circuitry coupled to the memory, the memory storing program code which, when executed by the processing circuitry, cause the processing circuitry to:

determine an expected number of allocated cache pages in connection with a non-volatile storage device that forms at least part of a flash cache;

perform a comparison between the expected number of allocated cache pages and an actual number of allocated or free cache pages in connection with the non-volatile storage device; and

based on the comparison, select a free cache page in connection with the non-volatile storage device to allocate as a cache page, to balance the allocated or free cache pages among a plurality of non-volatile storage devices that form the flash cache, wherein the non-volatile storage device is one of the plurality of non-volatile storage devices that forms the flash cache; and wherein determining the expected number of allocated cache pages in connection with the non-volatile storage device comprises: forming a first value relating to available cache storage associated with the non-volatile storage device; forming a second value relating to available cache storage associated with the flash cache; forming a ratio of the first value to the second value to produce a third value; forming a fourth value relating to an actual number of allocated cache pages in connection with the flash cache; and forming a product of the third and fourth values to produce the expected number of allocated cache pages in connection with the non-volatile storage device.

8. The apparatus as claimed in claim 7 , wherein the non-volatile storage device is one of the plurality of non-volatile storage devices that forms the flash cache; and

wherein the memory stores program code which, when executed by the processing circuitry, cause the processing circuitry to:

receive a write I/O relating to a cache page in connection with another non-volatile storage device of the plurality of non-volatile storage devices that forms the flash cache;

perform a second comparison between the expected number of allocated cache pages and an actual number of allocated or free cache pages in connection with the another non-volatile storage device;

based on the second comparison, write data associated with the write I/O to the selected cache page in connection with the non-volatile storage device; and

send a command to free the cache page in connection with the another non-volatile storage device.

9. The apparatus as claimed in claim 7 , wherein the non-volatile storage device is one of the plurality of non-volatile storage devices that forms the flash cache; and

wherein the memory stores program code which, when executed by the processing circuitry, cause the processing circuitry to:

receive data that is one of promoted or demoted to the flash cache; and

store the data in the selected cache page in connection with the non-volatile storage device of the plurality of non-volatile storage devices that forms the flash cache.

10. The apparatus as claimed in claim 7 , wherein the non-volatile storage device is one of the plurality of non-volatile storage devices that forms the flash cache; and

wherein the memory stores program code which, when executed by the processing circuitry, cause the processing circuitry to:

detect an intention to remove one of the plurality of non-volatile storage devices from the flash cache; and

move data associated with a cache page in connection with the one of the plurality of non-volatile storage devices to the selected cache page.

11. The apparatus as claimed in claim 7 , wherein the actual number corresponds to the amount of allocated cache pages in connection with the non-volatile storage device; and

wherein performing the comparison, comprises:

determining if the expected number of allocated cache pages is greater or less than the actual number of allocated cache pages in connection with the non-volatile storage device; and

in response to determining the expected number is greater than the actual number, determining to select a free cache page in connection with the non-volatile storage device to allocate as a cache page.

12. The apparatus as claimed in claim 7 , wherein the actual number corresponds to the amount of free cache pages in connection with the non-volatile storage device; and

wherein performing the comparison, comprises:

determining if the expected number of allocated cache pages is greater or less than the actual number of free cache pages in connection with the non-volatile storage device; and

in response to determining the expected number is less than the actual number, determining to select a free cache page in connection with the non-volatile storage device to allocate as a cache page.

13. A computer program product having a non-transitory computer readable medium which stores a set of instructions, the set of instructions, when carried out by processing circuitry, causing the processing circuitry to perform a method, the method comprising:

determining an expected number of allocated cache pages in connection with a non-volatile storage device that forms at least part of a flash cache;

performing a comparison between the expected number of allocated cache pages and an actual number of allocated or free cache pages in connection with the non-volatile storage device; and

based on the comparison, selecting a free cache page in connection with the non-volatile storage device to allocate as a cache page, to balance the allocated or free cache pages among a plurality of non-volatile storage devices that form the flash cache, wherein the non-volatile storage device is one of the plurality of non-volatile storage devices that forms the flash cache; and wherein determining the expected number of allocated cache pages in connection with the non-volatile storage device comprises: forming a first value relating to available cache storage associated with the non-volatile storage device; forming a second value relating to available cache storage associated with the flash cache; forming a ratio of the first value to the second value to produce a third value; forming a fourth value relating to an actual number of allocated cache pages in connection with the flash cache; and forming a product of the third and fourth values to produce the expected number of allocated cache pages in connection with the non-volatile storage device.

14. The computer program product as claimed in claim 13 , wherein the non-volatile storage device is one of the plurality of non-volatile storage devices that forms the flash cache; and

wherein the method further comprises:

receiving a write I/O relating to a cache page in connection with another non-volatile storage device of the plurality of non-volatile storage devices that forms the flash cache;

performing a second comparison between the expected number of allocated cache pages and an actual number of allocated or free cache pages in connection with the another non-volatile storage device;

based on the second comparison, writing data associated with the write I/O to the selected cache page in connection with the non-volatile storage device; and

sending a command to free the cache page in connection with the another non-volatile storage device.

15. The computer program product as claimed in claim 13 , wherein the non-volatile storage device is one of the plurality of non-volatile storage devices that forms the flash cache; and

wherein the method further comprises:

receiving data that is one of promoted or demoted to the flash cache; and

storing the data in the selected cache page in connection with the non-volatile storage device of the plurality of non-volatile storage devices that forms the flash cache.

16. The computer program product as claimed in claim 13 , wherein the non-volatile storage device is one of the plurality of non-volatile storage devices that forms the flash cache; and

wherein the method further comprises:

detecting an intention to remove one of the plurality of non-volatile storage devices from the flash cache; and

moving data associated with a cache page in connection with the one of the plurality of non-volatile storage devices to the selected cache page.

17. The computer program product as claimed in claim 13 , wherein the actual number corresponds to the amount of allocated cache pages in connection with the non-volatile storage device; and

wherein performing the comparison, comprises:

determining if the expected number of allocated cache pages is greater or less than the actual number of allocated cache pages in connection with the non-volatile storage device; and

in response to determining the expected number is greater than the actual number, determining to select a free cache page in connection with the non-volatile storage device to allocate as a cache page.

Assignments (8)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (046366/0014) Recorded May 20, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
Reel/Frame 060450/0306 →
RELEASE OF SECURITY INTEREST AT REEL 046286 FRAME 0653 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
Reel/Frame 058298/0093 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
PATENT SECURITY AGREEMENT (CREDIT) Recorded Jun 1, 2018
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 046286/0653 →
PATENT SECURITY AGREEMENT (NOTES) Recorded Jun 1, 2018
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 046366/0014 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 31, 2016
From: LI, LIAM XIONGCHENG; XU, XINLEI; YANG, LIFENG; GAO, JIAN; CHEN, LILI
To: EMC CORPORATION
Reel/Frame 038156/0266 →