IP Library Granted Patent US 10,649,672
Granted Patent B1
US 10,649,672 · App. 15/087,950 · Granted May 12, 2020

Offloading device maintenance to an external processor in low-latency, non-volatile memory

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Quick Facts
Patent No.
US 10,649,672
App. No.
15/087,950
Granted
May 12, 2020
Kind
B1
Abstract

A set of device maintenance related data is received from each of a plurality of non-volatile memory modules. Each of the plurality of non-volatile memory modules comprise a plurality of non-volatile memory devices. Based at least in part on said set of device maintenance related data a maintenance operation to be performed is determined. The determined device maintenance related operation is performed.

Claims (45)

1. A data storage system, comprising:

a control module connected to each non-volatile memory module in a plurality of non-volatile memory modules each comprising a plurality of low-latency non-volatile memory devices, wherein the control module comprises a processor external to said non-volatile memory modules, the processor being configured to:

receive from each of said non-volatile memory modules a set of device maintenance related data, wherein the set of device maintenance related data includes a write disturb count for each cell of a plurality of cells of a low-latency non-volatile memory device;

determine based at least in part on said set of device maintenance related data a maintenance operation to be performed, comprising to:

determine whether a write disturb count of a neighboring cell of a cell exceeds or is equal to a count limit, wherein the count limit is selected based on a first neighboring cell or a second neighboring cell, wherein the count limit is updated based on a location of the neighboring cell on the low-latency non-volatile memory device, a temperature of the low-latency non-volatile memory device, and a version of 3D media; and wherein the neighboring cell is an adjacent cell of the cell; and

in response to a determination to that the write disturb count of the neighboring cell of the cell exceeds or is equal to the count limit, determine that the maintenance operation is to be performed; and

perform the maintenance operation, comprising to:

read data in a block including the neighboring cell; and

re-write the data into the block at an original block address of the block.

2. The system recited in claim 1 , wherein the external processor is connected by a PCIe bus to said non-volatile memory modules.

3. The system recited in claim 2 , wherein each of the plurality of low-latency non-volatile memory devices has internal data which may be overwritten in place.

4. The system recited in claim 3 , wherein each non-volatile memory module further comprises a module microprocessor, and wherein the module microprocessor is configured to send module maintenance related data.

5. The system recited in claim 4 , wherein the external processor is further configured to send to each module microprocessor associated with each non-volatile memory module persistence training.

6. The system recited in claim 5 , wherein persistence training includes a persistence algorithm in an event non-volatile memory module power is lost.

7. The system recited in claim 6 , wherein the persistence algorithm includes redundancy instructions.

8. The system recited in claim 7 , wherein the maintenance operation comprises scrubbing.

9. The system recited in claim 8 , wherein said set of device maintenance related data comprises scrubbing data.

10. The system recited in claim 9 , wherein said scrubbing data comprises an indication related to how much error correction has been exercised.

11. The system recited in claim 10 , wherein the control module runs software on an external processor.

12. The system recited in claim 11 , wherein the maintenance operation is determined across two or more non-volatile memory modules.

13. The system recited in claim 12 , wherein said set of device maintenance related data comprises wear data.

14. The system recited in claim 13 , wherein the maintenance operation comprises determining based at least in part on the wear data a write-in-place migration from a first non-volatile memory module to the first non-volatile memory module.

15. The system recited in claim 13 , wherein the maintenance operation comprises determining based at least in part on the wear data a write-in-place migration from a first non-volatile memory module to a second non-volatile memory module.

16. The system recited in claim 14 , wherein said set of device maintenance related data comprises location data of objects across two or more non-volatile memory modules.

17. The system recited in claim 16 , wherein location data of objects includes physical layout data and three-dimensional disturb tracking along an X-axis, Y-axis, and Z-axis.

18. A method of storing data, comprising:

receiving from each of a plurality of non-volatile memory modules a set of device maintenance related data;

wherein each of the plurality of non-volatile memory modules comprise a plurality of low-latency non-volatile memory devices, wherein the set of device maintenance related data includes a write disturb count for each cell of a plurality cells of a low-latency non-volatile memory device;

determining based at least in part on said set of device maintenance related data a maintenance operation to be performed, comprising:

determining whether the write disturb count of a neighboring cell of a cell exceeds or is equal to a count limit wherein the count limit is selected based on a first neighboring cell or a second neighboring cell, wherein the count limit is updated based on a location of the neighboring cell on the low-latency non-volatile memory device, a temperature of the low-latency non-volatile memory device, and a version of 3D media;

and wherein the neighboring cell is an adjacent cell of the cell; and

in response to a determination to that the write disturb count of the neighboring cell of the cell exceeds or is equal to the count limit, determining that the maintenance operation is to be performed; and

performing the maintenance operation, comprising:

reading data in a block including the neighboring cell; and

re-writing the data into the block at an original block address of the block.

19. A computer program product for data storage, the computer program product being embodied in a non-transitory computer readable storage medium and comprising computer instructions for:

receiving from each of a plurality of non-volatile memory modules a set of device maintenance related data;

wherein each of the plurality of non-volatile memory modules comprise a plurality of low-latency non-volatile memory devices, wherein the set of device maintenance related data includes a write disturb count for each cell of a plurality cells of a low-latency non-volatile memory device;

determining based at least in part on said set of device maintenance related data a maintenance operation to be performed, comprising:

determining whether the write disturb count of a neighboring cell of a cell exceeds or is equal to a count limit wherein the count limit is selected based on a first neighboring cell or a second neighboring cell, wherein the count limit is updated based on a location of the neighboring cell on the low-latency non-volatile memory device, a temperature of the low-latency non-volatile memory device, and a version of 3D media;

and wherein the neighboring cell is an adjacent cell of the cell; and

in response to a determination to that the write disturb count of the neighboring cell of the cell exceeds or is equal to the count limit, determining that the maintenance operation is to be performed; and

performing the maintenance operation, comprising:

reading data in a block including the neighboring cell; and

re-writing the data into the block at an original block address of the block.

Assignments (5)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 3, 2017
From: EMC CORPORATION
To: EMC IP HOLDING COMPANY LLC
Reel/Frame 041872/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 21, 2016
From: NISHIMOTO, MICHAEL
To: EMC CORPORATION
Reel/Frame 038972/0476 →