Semiconductor device and manufacturing method of the same
A minute transistor with low parasitic capacitance, high frequency characteristics, favorable electrical characteristics, stable electrical characteristics, and low off-state current is provided. A semiconductor device includes a semiconductor over a substrate, a source and a drain over the semiconductor, a first insulator over the source and the drain, a second insulator over the semiconductor, a third insulator in contact with a side surface of the first insulator and over the second insulator, and a gate over the third insulator. The semiconductor includes a first region overlapping with the source, a second region overlapping with the drain, and a third region overlapping with the gate. The length between a top surface of the third region of the semiconductor and a bottom surface of the gate is longer than the length between the first region and the third region.
1. A semiconductor device comprising:
an oxide semiconductor comprise indium and zinc over a substrate;
a source and a drain over the oxide semiconductor;
a first insulating layer over the source and the drain, the first insulating layer having a trench between the source and the drain;
an oxide film over the oxide semiconductor;
a second insulating layer over the oxide film; and
a gate over the second insulating layer,
wherein:
a top surface of the first insulating layer and a top surface of the gate are polished surfaces, in which the top surface of the first insulating layer is approximately at the same level as the top surface of the gate,
the oxide film, the second insulating layer, and the gate are in the trench,
the oxide film includes a metal element contained in the oxide semiconductor,
the second insulating layer is in direct contact with a side surface of the first insulating layer,
the oxide semiconductor includes a first region overlapping with the source, a second region overlapping with the drain, and a third region overlapping the lowest surface of the gate, and
a first distance between a top surface of the third region and a bottom surface of the gate is longer than a second distance between the first region and the third region.
2. The semiconductor device according to claim 1 , further comprising:
a bottom gate under the oxide semiconductor; and
a third insulating layer between the bottom gate and the oxide semiconductor,
wherein the third insulating layer includes the metal element.
3. The semiconductor device according to claim 1 , wherein the oxide semiconductor further contains gallium.
4. The semiconductor device according to claim 1 , wherein the third region has a smaller thickness than the first region and the second region.
5. The semiconductor device according to claim 1 , wherein the second insulating layer includes at least one of gallium, hafnium and aluminum.
6. The semiconductor device according to claim 1 , further comprising:
a conductor over and in contact with the gate,
wherein a third distance between the conductor and the source or the drain is longer than a fourth distance between the first region and the second region.
7. The semiconductor device according to claim 6 , wherein the third distance is larger than or equal to 1.5 times as large as the fourth distance and less than or equal to 2 times as large as the fourth distance.
8. The semiconductor device according to claim 1 , wherein the second distance is greater than 0 nm.
9. The semiconductor device according to claim 1 , wherein the gate does not overlap with the source and the drain.
10. A semiconductor device comprising:
an oxide semiconductor containing at least indium and zinc over a substrate;
a source and a drain over the oxide semiconductor;
a first insulating layer over the source and the drain, the first insulating layer having a trench between the source and the drain;
a first oxide film over the oxide semiconductor;
a second oxide film over the first oxide film;
a second insulating layer over the second oxide film; and
a gate over the second insulating layer,
wherein:
the first oxide film, the second oxide film, the second insulating layer, and the gate are in the trench,
each of the first oxide film and the second oxide film includes a metal element contained in the oxide semiconductor,
the first oxide film is in direct contact with a side surface of the first insulating layer,
the second insulating layer is in contact with a side surface of the gate,
the oxide semiconductor includes a first region overlapping with the source, a second region overlapping with the drain, and third region overlapping the lowest surface of the gate, and
a first distance between a top surface of the third region and a bottom surface of the gate is longer than a second distance between the first region and the third region.
11. The semiconductor device according to claim 10 , further comprising:
a bottom gate under the oxide semiconductor; and
a third insulating layer between the bottom gate and the oxide semiconductor,
wherein the third insulating layer includes the metal element.
12. The semiconductor device according to claim 10 , wherein the oxide semiconductor further contains gallium.
13. The semiconductor device according to claim 10 , wherein the third region has a smaller thickness than the first region and the second region.
14. The semiconductor device according to claim 10 , wherein the second insulating layer includes at least one of gallium, hafnium and aluminum.
15. The semiconductor device according to claim 10 , further comprising:
a conductor over and in contact with the gate,
wherein a third distance between the conductor and the source or the drain is longer than a fourth distance between the first region and the second region.
16. The semiconductor device according to claim 15 , wherein the third distance is larger than or equal to 1.5 times as large as the fourth distance and less than or equal to 2 times as large as the fourth distance.
17. The semiconductor device according to claim 10 , wherein the second distance is greater than 0 nm.
18. The semiconductor device according to claim 10 , wherein the gate does not include a region overlapping with the source and the drain.
19. A semiconductor device comprising:
an oxide semiconductor containing at least indium and zinc over a substrate;
a source and a drain over the oxide semiconductor;
a first insulating layer over the source and the drain, the first insulating layer having a trench between the source and the drain;
an oxide film over the oxide semiconductor;
a second insulating layer over the oxide film; and
a gate over the second insulating layer,
wherein:
a top surface of the first insulating layer and a top surface of the gate are polished surfaces, in which the top surface of the first insulating layer is approximately at the same level as the top surface of the gate,
the oxide film, the second insulating layer, and the gate are in the trench,
the oxide film includes a metal element contained in the oxide semiconductor,
the oxide film is in contact with a side surface of the first insulating layer,
the second insulating layer is in direct contact with a side surface of the gate,
the oxide semiconductor includes a first region overlapping with the source, a second region overlapping with the drain, and a third region overlapping the lowest surface of the gate,
a first distance between a top surface of the third region and a bottom surface of the gate is longer than a second distance between the first region and the third region,
a third distance is defined by a distance between the top surface of the first insulating layer on the source or the drain and the top surface of the source or the drain,
a fourth distance is defined by a distance between the first region and the second region, and
the third distance is larger than or equal to 1.5 times as large as the fourth distance and less than or equal to 2 times as large as the fourth distance.