IP Library Granted Patent US 10,424,635
Granted Patent B2
US 10,424,635 · App. 15/092,294 · Granted Sep 24, 2019

High voltage semiconductor device with guard rings and method associated therewith

Inventors: Filip Kudrna (Roynov, CZ); Roman Malousek (Frenstat, CZ)
Assignee: Littelfuse, Inc.
H01L29/0623H01L27/0629H01L29/0619H01L29/0638H01L29/7395H01L29/1095H01L29/16H01L29/861
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Quick Facts
Patent No.
US 10,424,635
App. No.
15/092,294
Granted
Sep 24, 2019
Kind
B2
Abstract

An electronic device including a substrate, a semiconductor element disposed on the substrate, and a plurality of guard rings at least partially surrounding the semiconductor element, wherein adjacent guard rings are spaced apart by a substantially uniform distance as measured along an entire length of the guard rings, and at least one of the plurality of guard rings has a flared portion. In an embodiment, at least one of the plurality of guard rings electrically floats. In another embodiment, the plurality of guard rings are disposed at least partially below a primary surface of the substrate. In an embodiment, the electronic device is a high voltage MOSFET or an IGBT.

Claims (39)

1. An electronic device comprising:

a substrate;

a semiconductor element disposed on the substrate;

a plurality of guard rings at least partially surrounding the semiconductor element, wherein:

adjacent guard rings are spaced apart by a substantially uniform distance as measured along an entire length of the guard rings, each pair of adjacent guard rings being spaced apart substantially the same distance as each other pair of adjacent guard rings, and

at least one of the plurality of guard rings has a widest, flared portion;

a field isolation region disposed on the substrate above the plurality of guard rings; and

a diode disposed on the field isolation region and coupled to at least one of the plurality of guard rings;

wherein a portion of the at least one of the plurality of guard rings extending between the widest, flared portion and the diode is narrower than the widest, flared portion.

2. The electronic device of claim 1 , wherein the substrate has a primary surface, and wherein the plurality of guard rings are disposed at least partially below the primary surface of the substrate.

3. The electronic device of claim 1 , wherein at least one of the plurality of guard rings electrically floats.

4. The electronic device of claim 1 , wherein the guard rings substantially completely surround the semiconductor element.

5. The electronic device of claim 1 , wherein each guard ring of the plurality of guard rings is electrically connected to a voltage supply terminal, and wherein the plurality of guard rings are adapted to operate with different voltage potentials as compared to each other.

6. The electronic device of claim 1 , wherein at least two of the plurality of guard rings have a substantially same width as measured at a first location, and wherein the widths of the at least two guard rings are different as measured at the widest, flared portions.

7. The electronic device of claim 1 , wherein at least one of the plurality of guard rings is substantially free of a widest, flared portion.

8. The electronic device of claim 1 , wherein the electronic device is adapted to operate with a voltage difference between a gate and collector of at least 400 Volts.

9. An electronic device comprising:

a substrate;

a semiconductor element disposed on the substrate;

a diode electrically connecting an electrode to the semiconductor element; and

a plurality of guard rings at least partially surrounding the semiconductor element, at least one of the plurality of guard rings has a widest, flared portion;

wherein a portion of the at least one of the plurality of guard rings extending between the widest, flared portion and the diode is narrower than the widest, flared portion;

wherein the plurality of guard rings are spaced apart by a substantially uniform distance as measured along an entire length of the guard rings, each pair of adjacent guard rings being spaced apart substantially the same distance as each other pair of adjacent guard rings.

10. The electronic device of claim 9 , wherein the guard rings are part of a same conductive layer as the diode.

11. The electronic device of claim 9 , wherein the diode and guard rings are at a same elevation.

12. The electronic device of claim 9 , wherein the diode is a clamp diode including a series of n-type regions and p-type regions, and wherein at least one of the n-type regions of the clamp diode has a width greater than or equal to the width of at least one guard ring of the plurality of guard rings, as measured at a location under the clamp diode.

13. The electronic device of claim 9 , wherein the electronic device is adapted to operate with a voltage difference between a gate and collector of at least 400 Volts.

14. The electronic device of claim 9 , wherein the electronic device is a high voltage MOSFET or an IGBT.

15. The electronic device of claim 9 , further comprising:

a field isolation region disposed on the substrate above the plurality of guard rings,

wherein the diode is disposed on the field isolation region and electrically connected to the plurality of guard rings through the field isolation region.

16. The electronic device of claim 9 , wherein the plurality of guard rings electrically float.

17. A method of using an electronic device comprising:

providing an electronic device including a plurality of guard rings at least partially surrounding a semiconductor element disposed on a substrate, at least one of the plurality of guard rings has a widest, flared portion;

providing a field isolation region disposed on the substrate above the plurality of guard rings;

providing a diode disposed on the field isolation region and coupled to at least one of the plurality of guard rings;

wherein a portion of the at least one of the plurality of guard rings extending between the widest, flared portion and the diode is narrower than the widest, flared portion;

biasing the plurality of guard rings each to a voltage that is within 10% of V N , which is defined by the equation V N =V 1 a N-1 ;

wherein adjacent guard rings are spaced apart by a substantially uniform distance as measured along an entire length of the guard rings, each pair of adjacent guard rings being spaced apart the same distance as each other pair of adjacent guard rings.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 25, 2017
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: LITTELFUSE, INC.
Reel/Frame 042506/0175 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 6, 2016
From: KUDRNA, FILIP; MALOUSEK, ROMAN
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 038209/0624 →