IP Library Granted Patent US 9,647,174
Granted Patent B2
US 9,647,174 · App. 15/098,779 · Granted May 9, 2017

Optoelectronic semiconductor chip

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Quick Facts
Patent No.
US 9,647,174
App. No.
15/098,779
Granted
May 9, 2017
Kind
B2
Abstract

An optoelectronic semiconductor chip includes a semiconductor layer sequence having an active layer that generates radiation and at least one n-doped layer adjoining the active layer, the semiconductor layer sequence is based on AlInGaN or on InGaN, one or a plurality of central layers composed of AlGaN each having thicknesses of 25 nm to 200 nm are grown at a side of the n-doped layer facing away from a carrier substrate, a coalescence layer of doped or undoped GaN having a thickness of 300 nm to 1.2 μm is formed at a side of the central layer or one of the central layers facing away from the carrier substrate, a roughening extends from the coalescence layer as far as or into the n-doped layer, a radiation exit area of the semiconductor layer stack is formed partly by the coalescence layer, and the central layer is exposed in places.

Claims (11)

1. An optoelectronic semiconductor chip comprising a semiconductor layer sequence having an active layer that generates radiation and having at least one n-doped layer, wherein

the n-doped layer adjoins the active layer,

the semiconductor layer sequence is based on AlInGaN or on InGaN,

one or a plurality of central layers composed of AlGaN each having thicknesses of 25 nm to 200 nm are grown at a side of the n-doped layer facing away from a carrier substrate,

a coalescence layer composed of doped or undoped GaN having a thickness of 300 nm to 1.2 μm is formed at a side of the central layer or of one of the central layers facing away from the carrier substrate,

a roughening extends from the coalescence layer as far as or into the n-doped layer,

a radiation exit area of the semiconductor layer stack is formed partly by the coalescence layer, and

the central layer is exposed in places.

2. The optoelectronic semiconductor chip according to claim 1 , further comprising a carrier substrate at a p-side of the semiconductor layer sequence.

3. The optoelectronic semiconductor chip according to claim 2 , further comprising a first contact layer fitted to the p-side of the semiconductor layer sequence, wherein the semiconductor layer sequence connects to the carrier substrate via the first contact layer.

4. The optoelectronic semiconductor chip according to claim 3 , wherein a further contact layer is fitted to the side of the semiconductor layer sequence facing away from the carrier substrate.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 3, 2020
From: OSRAM OPTO SEMICONDUCTORS GMBH
To: OSRAM OLED GMBH
Reel/Frame 051467/0906 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 14, 2016
From: HERTKORN, JOACHIM; ENGL, KARL; HAHN, BERTHOLD; WEIMAR, ANDREAS
To: OSRAM OPTO SEMICONDUCTORS GMBH
Reel/Frame 038283/0001 →