Scan driver and organic light-emitting display using same
The present invention provides a scanning driver and an organic light-emitting display using the same. The scanning driver comprises a plurality of cascaded structures receiving signals from a first timing clock line (CK 1 ) and a second timing clock line (CK 2 ) with opposite phases, the cascaded structures successively generating output signals (i.e., scanning signals), wherein each of the cascaded structures comprises: a first transistor, connected to a starting signal line or to a scanning output line of a previous cascaded structure; a second transistor, connected to the second timing clock line and to the scanning output line; a third transistor connected to a high-level power supply VGH; a fourth transistor, connected to a low-level power supply VGL and to an output terminal of the third transistor; a fifth transistor, connected to a high-level power supply VGH and to a scanning output line; and a first capacitor, connected between an output terminal of the first transistor and the scanning output line. Arranging a first capacitor C 1 between the output terminal of M 1 and the scanning output line prevents slight-ON of M 2 , thus reducing the reverse current at the scanning driver and reducing the power consumption.
1. A scanning driver, comprising: a plurality of cascaded structures receiving signals from a first timing clock line and a second timing clock line with opposite phases, the cascaded structures successively generating scanning signals, wherein each of the cascaded structures comprises:
a first transistor, connected to a starting signal line or to a scanning output line of the previous cascaded structure, the first transistor comprising a gate connected to the first timing clock line;
a second transistor, connected to the second timing clock line and the scanning output line, the second transistor comprising a gate connected to an output terminal of the first transistor;
a third transistor, connected to a high-level power supply VGH, the third transistor comprising a gate connected to an output terminal of the second transistor;
a fourth transistor, connected to a low-level power supply VGL and to an output terminal of the third transistor, the fourth transistor comprising a gate connected to the first timing clock line;
a fifth transistor, connected to a high-level power supply VGH and to a scanning output line, the fifth transistor comprising a gate connected to an output terminal of the fourth transistor and to an output terminal of the third transistor; and
a first capacitor, connected between an output terminal of the first transistor and the scanning output line.
2. The scanning driver according to the claim 1 , wherein each of the cascaded structures further comprises:
a second capacitor, connected between an output terminal of the first transistor and a fixed potential.
3. The scanning driver according to the claim 2 , characterized in that the fixed potential is a low-level power supply VGL.
4. The scanning driver according to claim 3 , wherein the transistors are bidirectional PMOS transistors or bidirectional P-type thin film field effect transistors.
5. An organic light-emitting display, comprising
a pixel array, connected to a data line and a scanning output line;
a data driver, configured to provide data signals to the data line;
a scanning driver, configured to provide scanning signals to the scanning output line as defined in claim 4 ; and
a timing controller, configured to provide timing signals and a high-level power supply VGH and a low-level power supply VGL to the scanning driver.
6. An organic light-emitting display, comprising
a pixel array, connected to a data line and a scanning output line;
a data driver, configured to provide data signals to the data line;
a scanning driver, configured to provide scanning signals to the scanning output line as defined in claim 3 ; and
a timing controller, configured to provide timing signals and a high-level power supply VGH and a low-level power supply VGL to the scanning driver.
7. The scanning driver according to the claim 2 , wherein the fixed potential is a high-level power supply VGH.
8. The scanning driver according to claim 7 , wherein the transistors are bidirectional PMOS transistors or bidirectional P-type thin film field effect transistors.
9. An organic light-emitting display, comprising
a pixel array, connected to a data line and a scanning output line;
a data driver, configured to provide data signals to the data line;
a scanning driver, configured to provide scanning signals to the scanning output line as defined in claim 8 ; and
a timing controller, configured to provide timing signals and a high-level power supply VGH and a low-level power supply VGL to the scanning driver.
10. An organic light-emitting display, comprising
a pixel array, connected to a data line and a scanning output line;
a data driver, configured to provide data signals to the data line;
a scanning driver, configured to provide scanning signals to the scanning output line as defined in claim 7 ; and
a timing controller, configured to provide timing signals and a high-level power supply VGH and a low-level power supply VGL to the scanning driver.
11. The scanning driver according to claim 2 , wherein the transistors are bidirectional PMOS transistors or bidirectional P-type thin film field effect transistors.
12. An organic light-emitting display, comprising
a pixel array, connected to a data line and a scanning output line;
a data driver, configured to provide data signals to the data line;
a scanning driver, configured to provide scanning signals to the scanning output line as defined in claim 11 ; and
a timing controller, configured to provide timing signals and a high-level power supply VGH and a low-level power supply VGL to the scanning driver.
13. An organic light-emitting display, comprising
a pixel array, connected to a data line and a scanning output line;
a data driver, configured to provide data signals to the data line;
a scanning driver, configured to provide scanning signals to the scanning output line as defined in claim 2 ; and
a timing controller, configured to provide timing signals and a high-level power supply VGH and a low-level power supply VGL to the scanning driver.
14. The scanning driver according to the claim 1 , wherein a first clock terminal of an odd one of the cascade structures is connected to the first timing clock line, and a second clock terminal thereof is connected to the second timing clock line; and a first clock terminal of an even one of the cascade structures is connected to the second timing clock line, and a second clock terminal thereof is connected to the first timing clock line.
15. The scanning driver according to claim 14 , wherein the transistors are bidirectional PMOS transistors or bidirectional P-type thin film field effect transistors.
16. An organic light-emitting display, comprising
a pixel array, connected to a data line and a scanning output line;
a data driver, configured to provide data signals to the data line;
a scanning driver, configured to provide scanning signals to the scanning output line as defined in claim 15 ; and
a timing controller, configured to provide timing signals and a high-level power supply VGH and a low-level power supply VGL to the scanning driver.
17. An organic light-emitting display, comprising
a pixel array, connected to a data line and a scanning output line;
a data driver, configured to provide data signals to the data line;
a scanning driver, configured to provide scanning signals to the scanning output line as defined in claim 14 ; and
a timing controller, configured to provide timing signals and a high-level power supply VGH and a low-level power supply VGL to the scanning driver.
18. The scanning driver according to claim 1 , wherein the transistors are bidirectional PMOS transistors or bidirectional P-type thin film field effect transistors.
19. The scanning driver according to claim 18 , wherein the transistors are bidirectional PMOS transistors or bidirectional P-type thin film field effect transistors.
20. An organic light-emitting display, comprising
a pixel array, connected to a data line and a scanning output line;
a data driver, configured to provide data signals to the data line;
a scanning driver, configured to provide scanning signals to the scanning output line as defined in claim 1 ; and
a timing controller, configured to provide timing signals and a high-level power supply VGH and a low-level power supply VGL to the scanning driver.