IP Library Granted Patent US 10,152,247
Granted Patent B2
US 10,152,247 · App. 15/113,824 · Granted Dec 11, 2018

Atomically committing write requests

Inventors: Sheng Li (Palo Alto, CA); Jishen Zhao (San Jose, CA); Jichuan Chang (Sunnyvale, CA); Parthasarathy Ranganathan (San Jose, CA); Alistair Veitch (Mountain View, CA); Kevin T. Lim (La Honda, CA); Mark Lillibridge (Mountain View, CA)
Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
G06F3/0619G06F3/0658G06F3/0659G06F3/0679G06F11/1471G06F11/1474G06F2201/805G11B27/36
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,152,247
App. No.
15/113,824
Granted
Dec 11, 2018
Kind
B2
Abstract

A technique includes acquiring a plurality of write requests from at least one memory controller and logging information associated with the plurality of write requests in persistent storage. The technique includes applying the plurality of write requests atomically as a group to persistent storage.

Claims (37)

1. A method comprising:

acquiring, by a log accelerator of an apparatus, a plurality of write requests from at least one memory controller of the apparatus;

logging, by the log accelerator, information associated with the plurality of write requests in persistent storage of the apparatus; and

applying, by the log accelerator, the plurality of write requests atomically as a group to the persistent storage.

2. The method of claim 1 , further comprising generating the plurality of write requests by executing machine executable instructions by at least one processor, wherein the logging is performed transparently with respect to the operations of the at least one processor.

3. The method of claim 1 , wherein the acquiring comprises probing a queue of the at least one memory controller.

4. The method of claim 1 , further comprising:

applying, by the log accelerator, the plurality of requests in response to a commit signal.

5. The method of claim 1 , wherein acquiring the plurality of write requests comprises accumulating write requests associated with a memory region associated with an atomic unit.

6. The method of claim 1 , wherein the logging comprises redo logging or undo logging.

7. An apparatus comprising:

at least one processor to issue write requests;

at least one memory controller to process the write requests;

a log accelerator to:

acquire the write requests;

identify a plurality of the write requests as being commonly associated with an atomic unit;

perform logging of information associated with the plurality of write requests; and

apply the plurality of write requests atomically to commit the plurality of write requests to persistent storage.

8. The apparatus of claim 7 , wherein the log accelerator performs the logging transparently with respect to the operations of the at least one processor.

9. The apparatus of claim 7 , wherein the log accelerator applies the plurality of write requests atomically in a process that comprises writing and flushing at least one commit record to a non-volatile memory.

10. The apparatus of claim 7 , wherein the log accelerator uses an associated logging memory space for the logging of the plurality of write requests and reuses the logging space after commitment of the plurality of write requests.

11. The apparatus of claim 7 , wherein the log accelerator comprises hardware separate from the at least one memory controller.

12. The apparatus of claim 7 , wherein:

the at least one processor, the at least one memory controller and the log accelerator being associated with a first node;

the log accelerator further performs redo logging; and

the at least one processor further communicates data associated with the redo logging to a second node other than the first node to maintain a consistent state of the data on the second node.

13. A system comprising:

a persistent storage;

a processor to generate a plurality of write requests;

a log accelerator to acquire the write requests, and log information about the write requests in the persistent storage without intervention by the processor,

wherein the processor is to signal the log accelerator to apply the write requests atomically as a group to the persistent storage.

14. The system of claim 13 , wherein the log accelerator is to log the write requests transparently with respect to operations of at the processor in generating the plurality of write requests.

15. The system of claim 13 , further comprising a memory controller having a queue in which the write requests are stored upon generation by the processor,

wherein the log accelerator is to acquire the plurality of write requests by probing the queue.

16. The system of claim 13 , wherein the log accelerator is further to apply the plurality of write requests in response to a commit signal.

17. The system of claim 13 , wherein the log accelerator is to acquire the plurality of write requests by accumulating the write requests associated with a memory region associated with an atomic unit.

18. The system of claim 13 , wherein the log accelerator is to log the information by redoing logging or undoing logging.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 23, 2016
From: LI, SHENG; ZHAO, JISHEN; CHANG, JICHUAN; RANGANATHAN, PARTHASARATHY; VEITCH, ALISTAIR; LIM, KEVIN T.; LILLIBRIDGE, MARK
To: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Reel/Frame 040408/0255 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 23, 2016
From: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
To: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Reel/Frame 040685/0001 →
Continuity (1)
Related Publication 20160342351A1 · Nov 24, 2016
Cited By (3)
US 12,210,417 US 12,379,867 US 12,436,693