Light-ray detection circuit
View Patent ↗The circuit of detection of light radiation includes a photodetector. The photodetector is coupled to three capacitors by means of three switches. The capacitors are parallel mounted to form a capacitive load whose value of electrical capacity changes as a function of the openings/closures of the switches. This configuration allows to stabilize the voltage present on the output terminal in the detection circuit for a wider range of illumination sustained by photodetector.
1. Detection device, comprising
a photodetector,
a biasing circuit configured to bias the photodetector,
an integration capacitive load configured to store electrical charges emitted by the photodetector,
an output terminal coupled to the integration capacitive load and designed to be connected to a processing circuit,
wherein the integration capacitive load is configured to present different values of electrical capacity, the integration capacitive load comprising:
at least first and second transit lines branch mounted between the photodetector and the output terminal, the first transit line including first and second switches mounted in series, the second transit line comprising third and fourth switches mounted in series,
a first capacitor having a first electrode connected between the first and second switches and a second electrode connected to a first source of predefined voltage,
a second capacitor having a first electrode connected between the third and fourth switches and a second electrode connected to a second source of predefined voltage,
a third capacitor mounted in series with an additional switch between a third source of predefined voltage and a connection between the first switch and the third switch,
a circuitry configured to reset independently the first capacitor, the second capacitor and the third capacitor.
2. Detection device according to claim 1 , wherein the first source of predefined voltage, the second source of predefined voltage and the third source of predefined voltage are a single source of predefined voltage configured to provide a same voltage to the first, second and third capacitors and wherein the circuitry configured to reset independently the first capacitor, the second capacitor and the third capacitor includes
a fifth switch connected in parallel with a series circuitry formed by the third capacitor mounted in series with the additional switch, and
a sixth switch connected between the single source of the predefined voltage and the output terminal.
3. Detection device according to claim 1 , comprising a control circuit configured to control the first, second third and fourth switches so that
charges emitted by the photodetector are stored in the third capacitor,
the stored charges are transferred in the first and second capacitors which mounted in parallel,
the processing circuit reads an information stored in first capacitor and/or in the second capacitor.
4. Detection device according to claim 3 , wherein the control circuit is configured to authorise reading by the processing circuit during at least one portion of a time period wherein the third capacitor is coupled to the photodetector so that the third capacitor stores charges from the photodetector.
5. Detection device according to claim 4 , wherein the control circuit is configured to reset the first and second capacitors during at least one portion of the time period wherein the third capacitor is coupled to the photodetector so that the third capacitor stores charges from the photodetector.
6. Detection device according claim 1 , comprising a control circuit configured to:
connect the third capacitor to the photodetector so that the charges emitted by the photodetector are stored in the third capacitor,
transfer the stored charges from the third capacitor to the first capacitor,
reset the third capacitor,
connect the third capacitor to the photodetector so that the charges emitted by the photodetector are stored in the third capacitor,
transfer the stored charges from the third capacitor to first capacitor and the second capacitor mounted in parallel with the first capacitor,
and wherein the control circuit is configured to successively authorize the processing circuit to read an information stored in the first capacitor and an information stored in first and second capacitors.
7. Detection device according to claim 1 , comprising a control circuit configured to:
connect the third capacitor to the photodetector so that the charges emitted by the photodetector are stored in the third capacitor, in a first step,
transfer the stored charges from the third capacitor to the first capacitor, in a second step,
reset the third capacitor, in a third step,
connect the third capacitor to the photodetector so that the charges emitted by the photodetector are stored in the third capacitor, in a fourth step,
transfer the stored charges from the third capacitor to the second capacitor, in a fifth step,
and wherein the control circuit is configured to successively authorize the processing circuit to read an information stored in the first capacitor during at least one portion of the fourth step and an information stored in first and second capacitors during at least one portion of the first step.
8. Detection device according to claim 1 , wherein a value of the electrical capacity of the first capacitor is equal to a value of the electrical capacity of the second capacitor.
9. Detection device according to claim 1 , comprising a single output terminal.
10. Detection device according to claim 1 , wherein the output terminal is defined by a terminal common to the second and fourth transistors.
11. Detection device according to claim 1 , wherein the third capacitor is connected only to the output terminal by means of the first and second transit lines.