IP Library Granted Patent US 9,711,459
Granted Patent B2
US 9,711,459 · App. 15/133,995 · Granted Jul 18, 2017

Multi-layer substrate with an embedded die

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Quick Facts
Patent No.
US 9,711,459
App. No.
15/133,995
Granted
Jul 18, 2017
Kind
B2
Abstract

The present disclosure relates to a multi-layer substrate structure with an embedded die to miniaturize designs and improve performance. The multi-layer substrate structure includes a core layer having a cavity and a die mounted within the cavity. The die has a die body, a die conductive element on a top surface of the die body, and a dielectric layer over the die conductive element. The multi-layer substrate structure also includes a substrate conductive element formed over a portion of a top surface of the core layer and extending over at least a portion of the die conductive element. Overlapping portions of the die conductive element and the substrate conductive element are separated by the dielectric layer and form an electronic component.

Claims (39)

1. An apparatus comprising:

a core layer having a cavity;

a die mounted within the cavity by a mounting material, wherein the die includes a die body, a first die conductive element on a top surface of the die body, and a first dielectric layer over the first die conductive element;

a first substrate conductive element formed over a portion of a top surface of the core layer and extending over at least a portion of the first die conductive element; and

a second dielectric layer sandwiched between the first substrate conductive element and the first dielectric layer, wherein:

the first dielectric layer and the second dielectric layer are formed of different materials;

overlapping portions of the first die conductive element and the first substrate conductive element are separated and electronically isolated by the first dielectric layer and the second dielectric layer; and

the overlapping portions of the first die conductive element and the first substrate conductive element, and the first dielectric layer and the second dielectric layer in between form an electronic component.

2. The apparatus of claim 1 wherein the electronic component is a capacitor, and the overlapping portions of the first die conductive element and the first substrate conductive element are plates for the capacitor.

3. The apparatus of claim 1 wherein the electronic component is a coupler, and the first substrate conductive element and the first die conductive element are used as a primary inductive segment and a secondary inductive segment of the coupler, respectively.

4. The apparatus of claim 1 wherein the mounting material is one of a group consisting of epoxy, resin, and epoxy resin.

5. The apparatus of claim 1 further comprising outer substrate layers over the core layer.

6. The apparatus of claim 5 wherein the outer substrate layers are formed of one of a group consisting of epoxy, resin, and epoxy resin.

7. The apparatus of claim 5 further comprising a first via structure coupled to the first substrate conductive element and formed through the outer substrate layers and the core layer.

8. The apparatus of claim 1 further comprising outer substrate layers on opposite sides of the core layer.

9. The apparatus of claim 1 further comprising a second die conductive element on the top surface of the die body and a second substrate conductive element formed over a portion of the top surface of the core layer and electronically coupled to the second die conductive element.

10. The apparatus of claim 9 wherein the first substrate conductive element and the second substrate conductive element are electronically isolated and reside in a common metal layer.

11. The apparatus of claim 9 wherein the first substrate conductive element and the second substrate conductive element comprise:

a first layer comprising nickel; and

a second layer comprising copper.

12. The apparatus of claim 9 further comprising

a metal bump on top of the second die conductive element, wherein

the second substrate conductive element is electronically coupled to the metal bump and the first dielectric layer is not over the metal bump.

13. The apparatus of claim 1 wherein the first dielectric layer is formed of one of a group consisting of silicon oxide, silicon nitride, polyamide, and tantalum pentoxide.

14. The apparatus of claim 1 wherein the first die conductive element is formed of one of a group consisting of copper, aluminum, gold, or alloy.

15. The apparatus of claim 1 wherein the first die conductive element has a thickness between 1 μm and 6 μm.

16. The apparatus of claim 1 wherein the first substrate conductive element has a thickness between 10 μm and 15 μm.

17. The apparatus of claim 1 wherein a thickness of the first dielectric layer between the first die conductive element and the second dielectric layer is between 0.25 μm and 5 μm.

18. The apparatus of claim 1 wherein a thickness of the second dielectric layer is between 2 μm and 10 μm.

19. The apparatus of claim 1 wherein the second dielectric layer is formed of one of a group consisting of silicon oxide, silicon nitride, polyamide, and tantalum pentoxide.

20. An apparatus comprising:

a core layer having a cavity;

a die mounted within the cavity by a mounting material, wherein the die includes a die body, a first die conductive element on a bottom surface of the die body, and a first dielectric layer covering the first die conductive element;

a first substrate conductive element underneath a portion of a bottom surface of the core layer and extending over at least a portion of the first die conductive element;

a second dielectric layer sandwiched between the first substrate conductive element and the first dielectric layer, wherein:

the first dielectric layer and the second dielectric layer are formed of different materials;

overlapping portions of the first die conductive element and the first substrate conductive element are separated and electronically isolated by the first dielectric layer and the second dielectric layer; and

the overlapping portions of the first die conductive element and the first substrate conductive element, and the first dielectric layer and the second dielectric layer in between form an electronic component; and

outer substrate layers underneath the core layer.

Assignments (2)
MERGER Recorded Jun 16, 2016
From: RF MICRO DEVICES, INC.
To: QORVO US, INC.
Reel/Frame 039196/0941 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 20, 2016
From: MCCHESNEY, BRYAN; CAPWELL, JOHN AVERY; CRANDALL, MARK ALAN
To: RF MICRO DEVICES, INC.
Reel/Frame 038335/0355 →