Nonvolatile semiconductor memory device
According to one embodiment, a nonvolatile semiconductor memory device includes a first structure having a first insulating layer, a semiconductor layer, and a second insulating layer stacked in this order in a first direction, the first structure extending in a second direction, memory cells provided on a surface of the semiconductor layer facing in a third direction, and connected in series in the second direction, and a third insulating layer contacting at least one of first and second end portions of the first structure in the second direction and not covering at least a part of an area between the first and second end portions. A lattice spacing of semiconductor atoms in the semiconductor layer in the second direction is larger than a lattice spacing of the semiconductor atoms in the semiconductor layer in the first direction.
1. A nonvolatile semiconductor memory device comprising:
a first structure including a first insulating layer, a semiconductor layer, and a second insulating layer stacked in this order in a first direction, the first structure extending in a second direction crossing the first direction;
memory cells provided on a surface of the semiconductor layer facing in a third direction crossing the first and second directions, and connected in series in the second direction; and
a third insulating layer contacting at least one of first and second end portions of the first structure in the second direction and not covering at least a part of an area between the first and second end portions,
wherein a lattice spacing of semiconductor atoms in the semiconductor layer in the second direction is larger than a lattice spacing of the semiconductor atoms in the semiconductor layer in the first direction.
2. The device of claim 1 , wherein
each of the memory cells comprises a second structure including a fourth insulating layer, a charge storage layer, a fifth insulating layer, and an electrode provided in this order on the surface of the semiconductor layer facing in the third direction.
3. The device of claim 1 , wherein
each of the first and second insulating layers comprises silicon oxide in which a ratio of silicon to oxygen is 1:x, where x is a number greater than 2.
4. The device of claim 1 , wherein
the third insulating layer covers a surface of the first structure facing in the second direction and does not cover a surface of the first structure facing in the third direction.
5. The device of claim 1 , wherein
the third insulating layer covers a surface of the first structure facing in the second direction and covers a part of a surface of the first structure facing in the third direction.
6. The device of claim 1 , further comprising
a semiconductor substrate having a surface, the first structure being provided on the surface,
wherein the first direction is a direction perpendicular to the surface, and
the second and third directions are directions parallel to the surface.
7. The device of claim 6 , wherein
the semiconductor substrate and the semiconductor layer include silicon atoms,
a lattice spacing of the silicon atoms in the semiconductor layer is larger than a lattice spacing of the silicon atoms in the semiconductor substrate in the second direction, and
the lattice spacing of the silicon atoms in the semiconductor layer is smaller than the lattice spacing of the silicon atoms in the semiconductor substrate in the first direction.