IP Library Patent Application 15139165
Patent Application
App. No. 15/139,165

MEMORY SYSTEM THAT UPDATES FIRMWARE IN RESPONSE TO PREDETERMINED EVENTS

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Patent No.
US None
App. No.
15/139,165
Abstract

A memory system includes a nonvolatile memory including first and second regions for storing firmware and a controller configured to access the nonvolatile memory based on a command from a host device. When the controller receives new firmware along with an update command and old firmware is stored in the first region, the controller stores the new firmware in the second region. When execution of firmware is triggered by an event specified by the update command after the new firmware has been stored, the controller executes the new firmware. When execution of firmware is triggered by an event that is not specified by the update command after the new firmware has been stored, the controller executes the old firmware.

Claims (59)

1 . A memory system, comprising:

a nonvolatile memory including first and second regions for storing firmware; and

a controller configured to access the nonvolatile memory based on a command from a host device, wherein

when the controller receives new firmware along with an update command and old firmware is stored in the first region, the controller stores the new firmware in the second region, and

when execution of firmware is triggered by an event specified by the update command after the new firmware has been stored, the controller executes the new firmware, and

when execution of firmware is triggered by an event that is not specified by the update command after the new firmware has been stored, the controller executes the old firmware.

2 . The memory system according to claim 1 , wherein

when the controller executes the new firmware, the controller invalidates the old firmware.

3 . The memory system according to claim 2 , wherein

the controller is further configured to set operational states of the first and second regions, such that

an operational state of the first region is set to be in a first state when the old firmware has been activated,

an operational state of the second region is set to be in a second state when the new firmware is stored in the second region,

an operational state of the second region is set to be in the first state when the new firmware therein is executed, and

an operational state of the second region is set to be in a third state when the old firmware is invalidated.

4 . The memory system according to claim 1 , further comprising:

a volatile memory, wherein

the controller loads at least part of the new and old firmware in the volatile memory to execute the new and old firmware, respectively.

5 . The memory system according to claim 1 , wherein

when the controller receives the new firmware along with a second update command and the old firmware is stored in the first region, the controller stores the new firmware in the second region and further executes the new firmware, instead of the old firmware.

6 . The memory system according to claim 5 , wherein

the storage of the new firmware received along with the second update command in the second region and the execution of the new firmware are carried out in parallel.

7 . The memory system according to claim 5 , wherein

the execution of the new firmware is carried out upon completion of the storage of the new firmware received along with the second update command in the second region.

8 . The memory system according to claim 1 , wherein

when the controller receives the new firmware along with a third update command and the old firmware is stored in the first region, the controller executes the new firmware without storing the new firmware in the second region.

9 . The memory system according to claim 1 , wherein

the update command is a WRITE BUFFER command that is in accordance with small computer system interface (SCSI) standard and includes a value of “0Dh” in a mode field thereof.

10 . The memory system according to claim 1 , wherein

the event specified by the update command includes at least one of a power-on of the memory system and a hard reset of the memory system.

11 . A method for updating firmware stored in a memory system that includes a nonvolatile memory having a first region that stores old firmware and a second region, the method comprising:

receiving new firmware along with an update command;

storing the new firmware in the second region of the nonvolatile memory;

when an event to trigger execution of firmware that is specified by the update command occurs after the new firmware has been stored, executing the new firmware; and

when an event to trigger execution of firmware that is not specified by the update command occurs after the new firmware has been stored, executing the old firmware.

12 . The method according to claim 11 , further comprising:

when the new firmware is executed, invalidating the old firmware.

13 . The method according to claim 11 , wherein

the memory system also includes a volatile memory,

when the new firmware is executed, at least part of the new firmware is loaded in the volatile memory,

when the old firmware is executed, at least part of the old firmware is loaded in the volatile memory.

14 . The method according to claim 11 , wherein

the update command is a WRITE BUFFER command that is in accordance with small computer system interface (SCSI) standard and includes a value of “0Dh” in a mode field thereof.

15 . The method according to claim 11 , wherein

the event specified by the update command includes at least one of a power-on of the memory system and a hard reset of the memory system

16 . A method for updating firmware stored in a memory system that includes a nonvolatile memory having a first region that stores old firmware and a second region, the method comprising:

receiving new firmware along with an update command;

when the update command is a first update command,

storing the new firmware in the second region of the nonvolatile memory,

when an event to trigger execution of firmware that is specified by the first update command occurs after the new firmware has been stored, executing the new firmware, and

when an event to trigger execution of firmware that is not specified by the first update command occurs after the new firmware has been stored, executing the old firmware; and

when the update command is a second update command, storing the new firmware in the second region and executing the new firmware.

17 . The method according to claim 16 , wherein

the storage of the new firmware received along with the second update command in the second region and the execution of the new firmware are carried out in parallel.

18 . The method according to claim 16 , wherein

the execution of the new firmware is carried out upon completion of the storage of the new firmware received along with the second update command in the second region.

19 . The method according to claim 16 , further comprising:

when the update command is a third update command, executing the new firmware without storing the new firmware in the second region.

20 . The method according to claim 16 , wherein

the event specified by the first update command includes at least one of a power-on of the memory system and a hard reset of the memory system.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043194/0647 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 26, 2016
From: TAMURA, MASAAKI; AIHARA, MASAMI; HARADA, TETSUJI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 038387/0942 →