Organic light-emitting diode display

1. An organic light-emitting diode (OLED) display comprising:

a substrate;

a scan line formed over the substrate and configured to provide a scan signal;

a data line crossing the scan line and configured to provide a data voltage;

a driving voltage line crossing the scan line and configured to provide a driving voltage;

a switching transistor electrically connected to the scan line and the data line;

a driving transistor electrically connected to the switching transistor and including a driving gate electrode, a driving source electrode, and a driving drain electrode;

a storage capacitor including i) a first storage electrode formed over the driving transistor and ii) the driving gate electrode as a second storage electrode, wherein the second storage electrode overlaps the first storage electrode in the depth dimension of the OLED display and extends from the driving voltage line; and

an OLED electrically connected to the driving transistor,

wherein the driving drain electrode overlaps a first portion of the data line to form a first holding capacitor.

2. The OLED display of claim 1 , wherein the data line includes i) a current data line configured to transmit a data signal to a current pixel and ii) an adjacent data line separated from the data line and configured to transmit an adjacent data signal to an adjacent pixel, and wherein the first holding capacitor includes:

the driving drain electrode as a first lower holding electrode; and

a first upper holding electrode overlapping the first lower holding electrode in the depth dimension of the OLED display, wherein the first upper holding electrode includes the a portion of the adjacent data line.

3. The OLED display of claim 2 , wherein the first upper holding electrode protrudes towards the data line a predetermined distance.

4. The OLED display of claim 2 , wherein the driving source electrode overlaps the a second portion of the driving voltage line in the depth dimension of the OLED display to form a second holding capacitor.

5. The OLED display of claim 4 , wherein the second holding capacitor includes:

the driving source electrode as a second lower holding electrode; and

a second upper holding electrode overlapping the second lower holding electrode in the depth dimension of the OLED display.

6. The OLED display of claim 5 , wherein the switching and driving transistors respectively include switching and driving channels, wherein the OLED display further comprises a semiconductor including the switching and driving channels formed over the substrate and separated from each other, wherein the driving channel overlaps the driving gate electrode, and wherein the driving channel is curved.

7. The OLED display of claim 6 , wherein the first and second lower holding electrodes are formed on the same layer as the driving channel.

8. The OLED display of claim 7 , further comprising:

a gate insulating layer covering the semiconductor; and

an interlayer insulating layer covering the gate insulating layer, wherein the first and second upper holding electrodes are formed over the interlayer insulating layer.

9. The OLED display of claim 8 , wherein the scan line is formed on the same layer as the first storage electrode, and wherein the data line and the second storage electrode are formed over the interlayer insulating layer.

10. The OLED display of claim 9 , wherein the driving voltage line includes a first driving voltage line substantially parallel to the data line and a second driving voltage line crossing the data line, wherein the first driving voltage line is formed on the same layer as the data line, and wherein the second driving voltage line is formed on the same layer as the scan line.

11. The OLED display of claim 10 , wherein the OLED includes a pixel electrode electrically connected to the driving transistor an organic emission layer formed on the pixel electrode and a common electrode formed on the organic emission layer, and

wherein the OLED display further comprises an initialization voltage line formed on the same layer as the pixel electrode and configured to provide an initialization voltage to initialize the driving transistor.