Methods and apparatuses for generating machine code for driving an execution unit

1. A method for generating machine code for driving an execution unit, comprising:

collecting a plurality of data access instructions of a kernel, which are associated with the same memory surface;

analyzing an address pattern associated with the data access instructions to generate a global-id address;

generating machine code comprising the global-id address; and

determining that the memory surface is a type image and analyzing the address pattern associated with the data access instructions to generate the global-id address when the data access instructions are associated with sample instructions.

2. The method of claim 1 , wherein the operation of analyzing an address pattern associated with the data access instructions to generate a global-id address further comprises:

determining whether the address pattern is a 2D (two-dimensional) address based on a global-id; and

if so, generating a 2D global-id address.

3. The method of claim 2 , wherein the step for determining whether the address pattern is a 2D (two-dimensional) address based on a global-id further comprises:

determining whether the address pattern is the 2D address based on the global-id by analyzing definition instructions and address calculation instructions associated with the memory surface.

4. The method of claim 3 , wherein the operation of determining whether the address pattern is a 2D (two-dimensional) address based on a global-id further comprises:

determining that the address pattern is the 2D address based on the global-id when the address calculation instructions satisfies “A*W+B”,

wherein W indicates a constant of width, A and B indicate variables varied with the global-id.

5. The method of claim 3 , wherein the 2D global-id address comprises the global-id and a 2D offset.

6. The method of claim 1 , wherein the operation of analyzing an address pattern associated with the data access instructions to generate a global-id address further comprises:

determining whether the address pattern is a 1D, 2D or 3D address based on a global-id by analyzing definition instructions and address calculation instructions associated with the memory surface;

generating a 1D global-id address when the address pattern is the 1D address based on the global-id;

generating a 2D global-id address when the address pattern is the 2D address based on the global-id; and

generating a 3D global-id address when the address pattern is the 3D address based on the global-id.

7. The method of claim 1 , further comprising:

determining that the memory surface is a type buffer or UAV (Un-order Accessed View) and analyzing the address pattern associated with the data access instructions to generate the global-id address when data types of all variables of the data access instructions are the same.

8. The method of claim 1 , further comprising:

when a data type of a variable of any data access instruction is not supported by an EU (Execution Unit), modifying the data access instruction with a new one containing a variable with a data type supported by the EU.

9. The method of claim 8 , further comprising:

writing a type of the memory surface and a dimension of the global-id address in a surface description table, thereby enabling a driver when executing the machine code to set a register of the EU.

10. The method of claim 1 , wherein the global-id address identifies a designated work item of a grid in parallel computing.

11. The method of claim 1 , wherein the memory surface indicates data of a range of memory addresses.

12. The method of claim 1 , wherein the EU is an execute unit for a compute shader and/or a 3D graphics shader in pipeline.