IP Library Granted Patent US 9,680,024
Granted Patent B2
US 9,680,024 · App. 15/145,896 · Granted Jun 13, 2017

Semiconductor device

Inventors: Shunpei Yamazaki (Tokyo, JP); Hideomi Suzawa (Kanagawa, JP); Yutaka Okazaki (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., LTD.
H01L29/78606H01L27/1052H01L29/42384H01L29/4908H01L29/517H01L29/66969H01L29/785H01L29/7869H01L29/78603H01L29/78648H01L29/78696
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Quick Facts
Patent No.
US 9,680,024
App. No.
15/145,896
Granted
Jun 13, 2017
Kind
B2
Abstract

To provide a semiconductor device that includes an oxide semiconductor and is miniaturized while keeping good electrical properties. In the semiconductor device, an oxide semiconductor layer filling a groove is surrounded by insulating layers including an aluminum oxide film containing excess oxygen. Excess oxygen contained in the aluminum oxide film is supplied to the oxide semiconductor layer, in which a channel is formed, by heat treatment in a manufacturing process of the semiconductor device. Moreover, the aluminum oxide film forms a barrier against oxygen and hydrogen, which inhibits the removal of oxygen from the oxide semiconductor layer surrounded by the insulating layers including an aluminum oxide film and the entry of impurities such as hydrogen in the oxide semiconductor layer. Thus, a highly purified intrinsic oxide semiconductor layer can be obtained. The threshold voltage is controlled effectively by gate electrode layers formed over and under the oxide semiconductor layer.

Claims (38)

1. A semiconductor device comprising:

a first insulating layer including a groove;

a plurality of gate electrodes at least in a bottom of the groove;

a second insulating layer over and in contact with the plurality of gate electrodes to cover the groove and at least part of a top of the first insulating layer;

a semiconductor layer overlapping with the plurality of gate electrodes with the second insulating layer interposed therebetween;

a plurality of source and drain electrodes over the first insulating layer with the second insulating layer and the semiconductor layer interposed therebetween, the plurality of source and drain electrodes each electrically connected to the semiconductor layer; and

a third insulating layer over the second insulating layer to cover the plurality of source and drain electrodes.

2. The semiconductor device according to claim 1 , wherein the plurality of source and drain electrodes partly overlap with the plurality of gate electrodes.

3. The semiconductor device according to claim 1 , wherein the second insulating layer covers a side and a bottom of the semiconductor layer in the groove.

4. The semiconductor device according to claim 1 , wherein the second insulating layer and the third insulating layer are in contact with each other in a region where the plurality of source and drain electrodes do not exist.

5. The semiconductor device according to claim 1 , wherein the semiconductor layer comprises an oxide semiconductor.

6. The semiconductor device according to claim 5 , further comprising:

a first oxide layer between the second insulating layer and the semiconductor layer; and

a second oxide layer between the semiconductor layer and the third insulating layer,

wherein each of the first oxide layer and the second oxide layer comprises one of metal elements contained in the oxide semiconductor.

7. The semiconductor device according to claim 6 , wherein the second oxide layer is over the plurality of source and drain electrodes to cover the semiconductor layer not covered with the plurality of source and drain electrodes.

8. The semiconductor device according to claim 1 , wherein each of the second insulating layer and the third insulating layer includes an aluminum oxide film containing excess oxygen.

9. The semiconductor device according to claim 8 , wherein the aluminum oxide film containing excess oxygen is an AlO x film (x>1.5).

10. A semiconductor device comprising:

a first insulating layer including a groove;

a plurality of first gate electrodes at least in a bottom of the groove;

a second insulating layer over and in contact with the plurality of first gate electrodes to cover the groove and at least part of a top of the first insulating layer;

a semiconductor layer overlapping with the plurality of first gate electrodes with the second insulating layer interposed therebetween;

a plurality of source and drain electrodes over the first insulating layer with the second insulating layer and the semiconductor layer interposed therebetween, the plurality of source and drain electrodes each electrically connected to the semiconductor layer;

a third insulating layer over the second insulating layer to cover the plurality of source and drain electrodes;

a plurality of second gate electrodes between the third insulating layer and the semiconductor layer; and

a plurality of insulating layers each between the plurality of second gate electrodes and the semiconductor layer.

11. The semiconductor device according to claim 10 , wherein the plurality of source and drain electrodes partly overlap with the plurality of first gate electrodes.

12. The semiconductor device according to claim 10 , wherein the second insulating layer covers a side and a bottom of the semiconductor layer in the groove.

13. The semiconductor device according to claim 10 , wherein the second insulating layer and the third insulating layer are in contact with each other in a region where the plurality of source and drain electrodes do not exist.

14. The semiconductor device according to claim 10 , wherein the semiconductor layer comprises an oxide semiconductor.

15. The semiconductor device according to claim 14 , further comprising:

a first oxide layer between the second insulating layer and the semiconductor layer; and

a second oxide layer between the semiconductor layer and the third insulating layer,

wherein each of the first oxide layer and the second oxide layer comprises one of metal elements contained in the oxide semiconductor.

16. The semiconductor device according to claim 15 , wherein the second oxide layer is over the plurality of source and drain electrodes to cover the semiconductor layer not covered with the plurality of source and drain electrodes.

17. The semiconductor device according to claim 10 , wherein each of the second insulating layer and the third insulating layer includes an aluminum oxide film containing excess oxygen.

18. The semiconductor device according to claim 17 , wherein the aluminum oxide film containing excess oxygen is an AlO x film (x>1.5).

Priority Claims (2)
JP 2013-106359 · May 20, 2013 · national
JP 2013-106378 · May 20, 2013 · national
Continuity (2)
Continuation 14279374 · May 16, 2014
Related Publication 20160247935A1 · Aug 25, 2016