Selective data recycling in non-volatile memory
Embodiments are directed to methods of classifying a flash memory block of N-level cells into sub-blocks. The N-level cells can store N bits of data. In some embodiments, the sub-blocks can represent one bit of each of the N-level cells. The sub-blocks can be selectively reclaimed in error-correction processes such as read disturb reclaim and retention refresh. Methods described can offer the advantage of reducing write amplification.
1. A method, comprising:
classifying sub-blocks in memory blocks comprising multi-level cells into sub-block types according to error rates, a first sub-block type having a higher error rate than a second sub-block type;
in a memory block where all sub-blocks of the first sub-block types have been reclaimed, performing a reclaim operations only on sub-blocks of the second sub-block type; and
in a memory block where all sub-blocks of the first sub-block types have not been reclaimed, performing a reclaim operations on sub-blocks of the first sub-block type that have not been reclaimed;
wherein performing a reclaim operation on a sub-block comprises:
determining that a condition associated with the sub-block is satisfied;
copying data associated with the sub-block to a second memory block different from a first memory block based on the determination that the condition associated with the sub-block is satisfied.
2. The method of claim 1 , wherein the determining that the condition associated with the sub-block is satisfied comprises:
determining one or more errors associated with the sub-block; and
determining that the one or more errors associated with the sub-block exceed a threshold value.
3. The method of claim 2 , wherein the one or more errors are caused by a read disturb.
4. The method of claim 2 wherein the one or more errors are caused by a loss of data retention.
5. The method of claim 1 , wherein the determining that the condition associated with the first sub-block is satisfied comprises:
determining a number of reads associated with the first sub-block type.
6. The method of claim 1 further comprising:
storing an indicator associated with the first memory block, wherein the indicator indicates that the data associated with the first sub-block of the first memory block has been copied to a different memory block.
7. The method of claim 1 further comprising:
determining that a condition associated with sub-blocks of the second sub-block type is satisfied;
copying data associated with the second sub-block type to a third memory block based on the determination that the condition associated with the second sub-block is satisfied.
8. The method of claim 7 , wherein the second memory block is the same as the third memory block.
9. The method of claim 7 , wherein the second memory block is different from the third memory block.
10. The method of claim 1 , wherein the first memory block further comprises a third sub-block type, the third sub-block representing a third bit of each of the plurality of N-bit cells.
11. A flash memory device comprising:
a flash memory, comprising:
a first memory block comprising a plurality of N-bit cells, wherein N is an integer;
a circuit comprising processing logic coupled to the flash memory and configured to classify sub-blocks in the first memory block into at least a first sub-block type and a second sub-block type, the first sub-block type having a higher error rate than the second sub-block type, the first sub-block type representing a first bit of each of the plurality of N-bit cells, and the second sub-block type representing a second bit of each of the plurality of N-bit cells;
the circuit further configured to perform a reclaim operation of the first memory block, wherein the circuit is configured to:
determine that all sub-blocks of the first sub-block type have been reclaimed;
perform a reclaim operation on sub-blocks of the second sub-block type using a second error count threshold, upon a determination that all sub-blocks of the first sub-block type have been reclaimed; and
perform a reclaim operation on sub-blocks of the first sub-block type using a first error count threshold, upon a determination that that not all sub-blocks of the first sub-block type have been reclaimed;
wherein, to perform a reclaim operation on a sub-block, the circuit is configured to:
determine that a condition associated with the sub-block is satisfied;
copy data associated with the sub-block to a second memory block different from a first memory block based on the determination that the condition associated with the sub-block is satisfied.
12. The flash memory device of claim 11 , wherein the determining that the condition associated with the sub-block is satisfied comprises:
determining one or more errors associated with the sub-block;
determining that the one or more errors associated with the sub-block exceed a threshold value.
13. The flash memory device of claim 12 wherein the one or more errors are caused by a read disturb.
14. The flash memory device of claim 12 wherein the one or more errors are caused by a loss of data retention.
15. The flash memory device of claim 11 , wherein the determining that the condition associated with the sub-block is satisfied comprises:
determining a number of reads associated with the sub-block.
16. The flash memory device of claim 11 , wherein the circuit is further configured to:
store an indicator associated with the first memory block, wherein the indicator indicates that the data associated with the first sub-block of the first memory block has been reclaimed.
17. The flash memory device of claim 11 , wherein the circuit is further configured to:
determine that a condition associated with sub-blocks of the second sub-block type is satisfied;
copy data associated with the second sub-block type to a third memory block based on the determination that the condition associated with the second sub-block is satisfied.
18. The flash memory device of claim 17 , wherein the second memory block is the same as the third memory block.
19. The flash memory device of claim 17 , wherein the second memory block is different from the third memory block.
20. The flash memory device of claim 11 , wherein the first memory block further comprises a third sub-block type, the third sub-block representing a third bit of each of the plurality of N-bit cells.
21. A non-transitory computer readable medium having stored thereon instructions that, when executed by a processor, perform a method, including:
classifying sub-blocks in memory blocks comprising multi-level cells into sub-block types according to error rates, a first sub-block type having a higher error rate than a second sub-block type;
in a memory block where all sub-blocks of the first sub-block type; have been reclaimed, performing a reclaim operations only on sub-blocks of the second sub-block type; and
in a memory block where all sub-blocks of the first sub-block types have not been reclaimed, performing a reclaim operations on sub-blocks of the first sub-block type that have not been reclaimed;
wherein performing a reclaim operation on a sub-block comprises:
determining that a condition associated with the sub-block is satisfied;
copying data associated with the sub-block to a second memory block different from a first memory block based on the determination that the condition associated with the sub-block is satisfied.