Display apparatus and a method of driving the same
A display apparatus includes a display panel including a plurality of pixels, wherein each of the pixels includes a switching element connected to a data line and a gate line, a light source configured to provide the display panel with a light, a light source driver configured to turn the light source on and off, and a panel driver configured to output a data voltage to the data lines and a gate signal to the gate lines during an ON period in which the light source turns on the light, and to block the data voltage to be applied to the data lines and the gate signal to be applied to the gate lines during an OFF period in which the light source turns off the light.
1. A display apparatus, comprising:
a display panel comprising a plurality of pixels, wherein each of the pixels comprises a switching element connected to a data line and a gate line;
a light source configured to provide the display panel with a light;
a light source driver configured to turn the light source on and off; and
a panel driver configured to output a data voltage to the data lines and a gate signal to the gate lines during an ON period in which the light source turns on the light, and to block the data voltage to be applied to the data lines and the gate signal to be applied to the gate lines during an OFF period in which the light source turns off the light.
2. The display apparatus of claim 1 , wherein a driving frequency of a panel synchronization signal for driving the display panel is substantially the same as a driving frequency of a light source driving signal for driving the light source.
3. The display apparatus of claim 1 , wherein an active period of a frame period in which the data voltage is applied to the data lines and the gate signal is applied to the gate lines, is shorter than the ON period of the light source.
4. The display apparatus of claim 1 , wherein when a panel synchronization signal is at a first frequency lower than a second frequency,
a light source driving signal has a duty ratio of about 50% and a frequency higher than the second frequency, and
the panel driver is configured to output the data voltage and the gate signal during a period corresponding to the ON period and to block the data voltage and the gate signal during a period longer than the OFF period.
5. The display apparatus of claim 1 , wherein a driving frequency of a light source driving signal is higher than a driving frequency of a panel synchronization signal.
6. The display apparatus of claim 5 , wherein the light source driving signal has a cyclic section corresponding to n-horizontal periods, the ON period is a first portion of the cyclic section and the OFF period is a second portion of the cyclic section.
7. The display apparatus of claim 6 , wherein the panel driver is configured to output the data voltage and the gate signal corresponding to the n-horizontal periods during the first portion of the cyclic section, and to block the data voltage and the gate signal during the second portion of the cyclic section.
8. The display apparatus of claim 5 , further comprising:
n-line buffers configured to store n-horizontal line data.
9. The display apparatus of claim 1 , wherein the light source comprises at least one light emitting diode.
10. The display apparatus of claim 9 , wherein the light source driving signal is a pulse width modulation signal.
11. A method of driving a display apparatus, comprising:
outputting a data voltage to a data line and a gate signal to a gate line during an ON period in which a light source turns on a light; and
blocking the data voltage to be applied to the data line and the gate signal to be applied to the gate line during an OFF period in which the light source turns off the light.
12. The method of claim 11 , wherein a driving frequency of a panel synchronization signal for driving a display panel is substantially the same as a driving frequency of a light source driving signal for driving the light source.
13. The method of claim 11 , wherein an active period of a frame period in which the data voltage is applied to the data line and the gate signal is applied to the gate line, is shorter than the ON period of the light source.
14. The method of claim 11 , wherein when a panel synchronization signal is at a first frequency lower than a second frequency,
a light source driving signal has a duty ratio of about 50% and a frequency higher than the second frequency, and
the data voltage and the gate signal are outputted during a period corresponding to the ON period and blocked during a period longer than the OFF period.
15. The method of claim 11 , wherein a driving frequency of a light source driving signal is higher than a driving frequency of a panel synchronization signal.
16. The method of claim 15 , wherein the light source driving signal has a cyclic section corresponding to n-horizontal periods, the ON period is a first portion of the cyclic section and the OFF period is a second portion of the cyclic section.
17. The method of claim 16 , wherein the data voltage and the gate signal corresponding to the n-horizontal periods are outputted the during the first portion of the cyclic section, and the data voltage and the gate signal are blocked during the second portion of the cyclic section.
18. The method of claim 15 , further comprising:
storing n-horizontal line data in n-line buffers.
19. The method of claim 11 , wherein the light source comprises at least one light emitting diode.
20. The method of claim 19 , wherein a pulse width modulation signal is a driving signal of the light source.