IP Library Granted Patent US 10,185,350
Granted Patent B2
US 10,185,350 · App. 15/155,472 · Granted Jan 22, 2019

Multi-processor system and method for internal time synchronization and event scheduling of multiple processors

Inventors: Kassie M. Bowman (Fort Wayne, IN); Andrew C. Marcum (Fort Wayne, IN); Philip P. Herb (Fort Wayne, IN)
Assignee: Raytheon Company
G06F1/12G06F1/04G06F1/14G06F2221/2151
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Quick Facts
Patent No.
US 10,185,350
App. No.
15/155,472
Granted
Jan 22, 2019
Kind
B2
Abstract

Embodiments of a multi-processor system and method for synchronization and event scheduling of multiple processing elements are generally described herein. In some embodiments, timing marks are provided to the processing elements and a start-timer command is broadcasted to the processing elements after an initial timing mark. The start-timer command instructs the processing elements to initiate an internal time reference after receipt of a next timing mark. Each of the processing elements maintains a copy of the internal time reference which may be used for synchronized event scheduling.

Claims (57)

1. A multi-processor system comprising:

a plurality of processing elements, each arranged to generate an internal time reference, wherein a first of the processing elements is arranged to:

provide a timing-synchronization signal comprising timing mark signals to the other processing elements, in response to a go-operational command from a second of the processing elements, the go-operational command instructing the first of the processing elements to broadcast a start-timer command;

broadcast the start-timer command to the other processing elements after an initial timing mark signal, the start-timer command instructing the other processing elements to initiate their internal time reference upon receipt of a next timing mark signal, and

initiate an internal time reference after receipt of the next timing mark signal,

wherein each of the plurality of processing elements, including the first of the plurality processing elements, initiates an internal time reference after receipt of the next timing mark signal, and

wherein for synchronous event scheduling at least one of the processing elements is arranged to provide an event command for an event to be initiated when the internal time references of those processing elements, that are configured to participate in the event simultaneously reach a time-stamp value indicated by the event command.

2. The multi-processor system of claim 1 wherein each of the processing elements includes an internal time counter to generate the internal time reference,

wherein each internal time counter is arranged to begin counting upon receipt of the next timing mark signal, and

wherein each internal time counter is arranged to count at a rate based on a common clock signal that is provided to each of the processing elements.

3. The multi-processor system of claim 2 wherein the timing mark signals comprise pulses, the timing-synchronization signal has a predetermined number of pulses per time period, and

wherein each of the processing elements is arranged to wait until a next pulse after receipt of the start-timer command to initiate the internal time reference.

4. The multi-processor system of claim 2 wherein each of the internal time counters comprises a multi-bit register arranged to count up from a predetermined value upon receipt of the next timing mark signal.

5. The multi-processor system of claim 4 wherein the first processing element is a time-synchronization manager,

wherein the second of the processing elements is a main controller that is arranged to:

determine when the other processing elements are ready for internal time synchronization; and

provide the go-operational command to the first processing element after the other processing elements are ready for internal time synchronization, the go-operational command instructing the first processing element to broadcast the start-timer command after the initial timing mark signal.

6. The multi-processor system of claim 5 wherein when the internal time counters of the processing elements are each generating an internal time reference, the processing elements are synchronized, and

wherein any one or more of the processing elements is arranged to:

provide the event command with the time-stamp value to indicated ones of the processing elements for synchronous event scheduling, the time-stamp value indicating an offset from a start time of the internal time reference, the event command instructing the indicated processing elements to initiate an event at a relative time indicated by the time-stamp value.

7. The multi-processor system of claim 6 wherein the time-stamp value is configured to indicate a specific value to be reached by the internal time counters.

8. The multi-processor system of claim 7 wherein prior to providing the event command, the processing element providing the event command is further arranged to:

correlate a time-of-day (TOD) for the event with the relative time of the internal time reference to determine the time-stamp value for the event; and

generate the event command to include the time-stamp value.

9. The multi-processor system of claim 7 , wherein the system is part of a software-defined radio (SDR) and includes radio-frequency (RF) circuitry controllable at least by the first processing element; and

wherein the event is an RF event comprising generation of a predetermined waveform by one or more of the processing elements including transmission or reception of the waveform by the RF circuitry.

10. A method for synchronization and event scheduling of multiple processing elements in a multi-processor system comprising a plurality of processing elements, the method comprising:

providing, by a first of the plurality of processing elements, a timing-synchronization signal comprising timing mark signals to the other processing elements;

broadcasting by the first of the plurality processing elements a start-timer command after an initial of the timing mark signals in response to a go-operational command by a second of the processing elements;

initiating, by each of the plurality of processing elements, including the first of the plurality of processing elements, in response to the start-timer command, an internal time reference after receipt of a next of the timing mark signals; and

providing, by one of the processing elements, an event command for an event to be initiated when the internal time references of those processing elements, that are configured to participate in the event, simultaneously reach a time-stamp value indicated by the event command.

11. The method of claim 10 wherein each of the processing elements includes an internal time counter to generate the internal time reference,

wherein the method includes each internal time counter:

beginning counting upon receipt of the next timing mark signal; and

counting at a rate based on a common clock signal that is provided to each of the processing elements.

12. The method of claim 11 wherein the timing mark signals comprise pulses and the timing-synchronization signal has a predetermined number of pulses per time period, and

wherein the method comprises waiting until a next pulse after receipt of the start-timer command to initiate the internal time reference.

13. The method of claim 12 further comprising:

providing, by the second of the processing elements, the go-operational command to the first processing element when the processing elements are ready for internal time synchronization, the go-operational command instructing the first processing element to broadcast the start-timer command after the initial timing mark signal.

14. The method of claim 10 wherein the time-stamp value is configured to indicate a specific value to be reached by internal time counters of the processing elements, and

wherein the event command is provided for synchronous event scheduling, and prior to providing the event command, the method comprises the processing element providing the event command:

correlating a time-of-day (ToD) for the event with a relative time of the internal time reference to determine the time-stamp value for the event; and

generating the event command to include the time-stamp value.

15. A multi-processor system comprising:

a plurality of processing elements, including a time-synchronization manager and at least one other processing element, each processing element arranged to generate an internal time reference with an internal time counter,

wherein the time-synchronization manager is arranged to:

provide a timing-synchronization signal comprising timing mark signals to the other processing elements in response to a go-operational command;

broadcast a start-timer command to the other processing elements after an initial timing mark signal, the start-timer command instructing the other processing elements to each initiate the internal time counter and begin counting upon receipt of a next timing mark signal; and

initiate an internal time reference after receipt of the next timing mark signal,

wherein each of the plurality of processing elements, including the time-synchronization manager, initiates an internal time reference after receipt of the next timing mark signal,

wherein each of the internal time counters is arranged to count at a rate based on a common clock signal, and

wherein at least one of the processing elements is arranged to provide an event command for an event to be initiated when the internal time counters of participating processing elements simultaneously reach a value indicated by the event command.

16. The multi-processor system of claim 15 wherein each of the internal time counters comprises a register arranged to count up from a predetermined value upon receipt of the next timing mark signal, and

wherein the value included in the event command corresponds with a count value that the registers of the processing elements are to simultaneously reach, for synchronous event scheduling by the processing elements participating in the event.

17. The multi-processor system of claim 16 wherein a size of the registers is selected based on the rate of the common clock signal to maintain synchronization of the registers for a time period of at least several months.

18. The multi-processor system of claim 17 wherein one of the processing elements comprises a main controller that is arranged to:

provide the go-operational command to the time-synchronization manager when the other processing elements are ready for internal time synchronization, the go-operational command instructing the time-synchronization manager to broadcast the start-timer command after the initial timing mark signal.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 1, 2020
From: RAYTHEON COMPANY
To: BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC.
Reel/Frame 053662/0331 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 17, 2016
From: BOWMAN, KASSIE M.; MARCUM, ANDREW C.; HERB, PHILIP P.
To: RAYTHEON COMPANY
Reel/Frame 038618/0954 →
Continuity (2)
Continuation 13777821 · Feb 26, 2013
Related Publication 20170017261A1 · Jan 19, 2017