Delay circuit and semiconductor device
To provide a delay circuit improved in the accuracy of a delay time. A delay circuit is provided which includes a plurality of switches respectively provided between a plurality of constant current sources and a delay time adjustment terminal, a control circuit which ON/OFF-controls the switches, and a comparator circuit which compares a voltage of the delay time adjustment terminal and a reference voltage. The control circuit sequentially turns ON the switches every preset period after a signal is inputted to a signal input terminal and sets as a delay time, a time taken for the comparator circuit to detect that the voltage of the delay time adjustment terminal exceeds the reference voltage.
1. A delay circuit comprising:
a signal input terminal;
an output terminal;
a delay time adjustment terminal;
a plurality of constant current sources;
a plurality of switches respectively provided between the constant current sources and the delay time adjustment terminal;
a control circuit which ON/OFF-controls the switches temporally; and
a comparator circuit which compares a voltage of the delay time adjustment terminal and a reference voltage,
wherein the control circuit sequentially turns ON the switches every preset period after a signal is inputted to the signal input terminal and sets as a delay time, a time taken for the comparator circuit to detect that the voltage of the delay time adjustment terminal exceeds the reference voltage.
2. The delay circuit according to claim 1 , wherein the control circuit includes an oscillation circuit connected to the signal input terminal, and a counter which outputs signals for turning ON the switches in response to a clock of the oscillation circuit.
3. The delay circuit according to claim 1 , including a constant current source which always allows a current to flow to the delay time adjustment terminal.
4. The delay circuit according to claim 2 , including a constant current source which always allows a current to flow to the delay time adjustment terminal.
5. A semiconductor device comprising a delay circuit according to claim 1 .