IP Library Granted Patent US 10,283,644
Granted Patent B2
US 10,283,644 · App. 15/172,576 · Granted May 7, 2019

Thin film transistor having stable threshold voltage and less parasitic capacitance, and display device using the same

Inventors: Isao Suzumura (Tokyo, JP); Norihiro Uemura (Tokyo, JP); Takeshi Noda (Tokyo, JP); Hidekazu Miyake (Tokyo, JP); Yohei Yamaguchi (Tokyo, JP)
Assignee: Japan Display Inc.
H01L29/78696G02F1/1337G02F1/1368G02F1/133345G02F1/133512G02F1/133514G02F1/134309H01L27/1225H01L27/1285H01L29/24H01L29/7869H01L29/78606H01L29/78618H01L29/78633H01L29/78693G02F2001/133357
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Quick Facts
Patent No.
US 10,283,644
App. No.
15/172,576
Granted
May 7, 2019
Kind
B2
Abstract

A thin film transistor includes a first oxide semiconductor, a source electrode, a drain electrode, a gate insulating film and a gate electrode. A second oxide semiconductor layer is between the first oxide semiconductor layer and the source electrode. A third oxide semiconductor layer is between the first oxide semiconductor layer and the drain electrode. The content ratio of oxygen/Indium in each of the second semiconductor layer and the third oxide semiconductor layer is equal to or larger than that of the first semiconductor layer. A thickness of each of the second semiconductor layer and the third oxide semiconductor layer is bigger than that of the first semiconductor layer.

Claims (23)

1. A thin film transistor using a first oxide semiconductor layer as a channel layer, the transistor comprising:

a substrate, the first oxide semiconductor layer which is formed on the substrate, a gate insulating film which is formed on the first oxide semiconductor layer, a gate electrode which is formed on the gate insulating film;

a first laminated film which includes a source electrode and a second oxide semiconductor layer, wherein the second oxide semiconductor layer is formed between the source electrode and the first oxide semiconductor layer in a source region; and

a second laminated film which includes a drain electrode and a third oxide semiconductor layer, wherein the third oxide semiconductor layer is formed between the drain electrode and the first oxide semiconductor layer in a drain region; wherein

the first oxide semiconductor layer, the second oxide semiconductor layer and the third oxide semiconductor layer include indium and oxygen,

a content ratio of oxygen to indium (O/In) in each of the second oxide semiconductor layer and the third oxide semiconductor layer is equal to or larger than that of the first oxide semiconductor layer, and

a film thickness of each of the second oxide semiconductor layer and the third oxide semiconductor layer is thicker than that of the first oxide semiconductor layer.

2. The thin film transistor according to claim 1 ,

wherein: 113 In concentration in the second oxide semiconductor layer and in the third oxide semiconductor layer is 0.1 to 1 times compared with that in the first oxide semiconductor layer, and

115 In 16 O concentration in the second oxide semiconductor layer and in the third oxide semiconductor layer is 1 to 2 times compared with that in the first oxide semiconductor layer.

3. The thin film transistor according to claim 1 , wherein the first, the second and the third oxide semiconductor layers further include Zn or Ga.

4. The thin film transistor according to claim 1 , wherein a film thickness of the channel layer is in a range of 5 nm to 50 nm.

5. The thin film transistor according to claim 1 , wherein

a film thickness of the second oxide semiconductor layer in the source region and a film thickness of the third oxide semiconductor layer in the drain region are in a range of 10 nm to 200 nm.

6. A display device which includes a display unit and a driving circuit unit, the display unit comprising:

a substrate, a first oxide semiconductor layer which is formed on the substrate, a gate insulating film which is formed on the first oxide semiconductor layer, a gate electrode which is formed on the gate insulating film;

a first laminated layer which includes a source electrode and a second oxide semiconductor layer, wherein the second oxide semiconductor layer is formed between the source electrode and the first oxide semiconductor layer in a source region; and

a second laminated layer which includes a drain electrode and a third oxide semiconductor layer, wherein the third oxide semiconductor layer is formed between the drain electrode and the first oxide semiconductor layer in a drain region; wherein

the first oxide semiconductor layer, the second oxide semiconductor layer and the third oxide semiconductor layer include indium and oxygen,

a content ratio of oxygen to indium (O/In) in each of the second oxide semiconductor layer and the third oxide semiconductor layer is equal to or larger than that of the first oxide semiconductor layer, and

a film thickness of each of the second oxide semiconductor layer and the third oxide semiconductor layer is thicker than that of the first oxide semiconductor layer.

7. The display device according to claim 6 , wherein the display unit includes a liquid crystal layer, an alignment film, a color filter, and a black matrix layer.

8. The display device according to claim 6 , wherein a lower film is disposed between the substrate and the first oxide semiconductor layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 22, 2025
From: JAPAN DISPLAY INC.
To: MAGNOLIA WHITE CORPORATION
Reel/Frame 072130/0313 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 6, 2016
From: SUZUMURA, ISAO; UEMURA, NORIHIRO; NODA, TAKESHI; MIYAKE, HIDEKAZU; YAMAGUCHI, YOHEI
To: JAPAN DISPLAY INC.
Reel/Frame 038810/0669 →
Priority Claims (1)
JP 2013-083282 · Apr 11, 2013 · national
Continuity (2)
Continuation 14245102 · Apr 4, 2014
Related Publication 20160284867A1 · Sep 29, 2016